From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:47155) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QfyXZ-0004Ip-8u for qemu-devel@nongnu.org; Sun, 10 Jul 2011 14:15:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QfyXL-0007cm-UX for qemu-devel@nongnu.org; Sun, 10 Jul 2011 14:15:36 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46911) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QfyXF-0007YG-3y for qemu-devel@nongnu.org; Sun, 10 Jul 2011 14:15:18 -0400 From: Avi Kivity Date: Sun, 10 Jul 2011 21:14:59 +0300 Message-Id: <1310321709-30770-47-git-send-email-avi@redhat.com> In-Reply-To: <1310321709-30770-1-git-send-email-avi@redhat.com> References: <1310321709-30770-1-git-send-email-avi@redhat.com> Subject: [Qemu-devel] [RFC v3 46/56] isa-mmio: concert to memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: kvm@vger.kernel.org Signed-off-by: Avi Kivity --- hw/isa.h | 2 + hw/isa_mmio.c | 67 +++++++++++++++++++++++---------------------------------- 2 files changed, 29 insertions(+), 40 deletions(-) diff --git a/hw/isa.h b/hw/isa.h index d2b6126..f1f2181 100644 --- a/hw/isa.h +++ b/hw/isa.h @@ -4,6 +4,7 @@ /* ISA bus */ #include "ioport.h" +#include "memory.h" #include "qdev.h" typedef struct ISABus ISABus; @@ -37,6 +38,7 @@ ISADevice *isa_create_simple(const char *name); extern target_phys_addr_t isa_mem_base; +void isa_mmio_setup(MemoryRegion *mr, target_phys_addr_t size); void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size); /* dma.c */ diff --git a/hw/isa_mmio.c b/hw/isa_mmio.c index ca957fb..09f0598 100644 --- a/hw/isa_mmio.c +++ b/hw/isa_mmio.c @@ -25,58 +25,45 @@ #include "hw.h" #include "isa.h" -static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr, - uint32_t val) +static void isa_mmio_write(void *opaque, target_phys_addr_t addr, + uint64_t val, unsigned size) { - cpu_outb(addr & IOPORTS_MASK, val); + switch (size) { + case 1: return cpu_outb(addr & IOPORTS_MASK, val); + case 2: return cpu_outw(addr & IOPORTS_MASK, val); + case 4: return cpu_outl(addr & IOPORTS_MASK, val); + default: abort(); + } } -static void isa_mmio_writew(void *opaque, target_phys_addr_t addr, - uint32_t val) +static uint64_t isa_mmio_read(void *opaque, target_phys_addr_t addr, + unsigned size) { - cpu_outw(addr & IOPORTS_MASK, val); + switch (size) { + case 1: cpu_inb(addr & IOPORTS_MASK); + case 2: cpu_inw(addr & IOPORTS_MASK); + case 4: cpu_inl(addr & IOPORTS_MASK); + default: abort(); + } } -static void isa_mmio_writel(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - cpu_outl(addr & IOPORTS_MASK, val); -} - -static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr) -{ - return cpu_inb(addr & IOPORTS_MASK); -} - -static uint32_t isa_mmio_readw(void *opaque, target_phys_addr_t addr) -{ - return cpu_inw(addr & IOPORTS_MASK); -} +static MemoryRegionOps isa_mmio_ops = { + .read = isa_mmio_read, + .write = isa_mmio_write, + .endianness = DEVICE_LITTLE_ENDIAN, +}; -static uint32_t isa_mmio_readl(void *opaque, target_phys_addr_t addr) +void isa_mmio_setup(MemoryRegion *mr, target_phys_addr_t size) { - return cpu_inl(addr & IOPORTS_MASK); + memory_region_init_io(mr, &isa_mmio_ops, NULL, "isa-mmio", size); } -static CPUWriteMemoryFunc * const isa_mmio_write[] = { - &isa_mmio_writeb, - &isa_mmio_writew, - &isa_mmio_writel, -}; - -static CPUReadMemoryFunc * const isa_mmio_read[] = { - &isa_mmio_readb, - &isa_mmio_readw, - &isa_mmio_readl, -}; +#include "exec-memory.h" void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size) { - int isa_mmio_iomemtype; + MemoryRegion *mr = qemu_malloc(sizeof(*mr)); - isa_mmio_iomemtype = cpu_register_io_memory(isa_mmio_read, - isa_mmio_write, - NULL, - DEVICE_LITTLE_ENDIAN); - cpu_register_physical_memory(base, size, isa_mmio_iomemtype); + isa_mmio_setup(mr, size); + memory_region_add_subregion(get_system_memory(), base, mr); } -- 1.7.5.3