From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:47714) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QhIR3-0001DE-8W for qemu-devel@nongnu.org; Thu, 14 Jul 2011 05:42:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QhIR1-0002vq-DS for qemu-devel@nongnu.org; Thu, 14 Jul 2011 05:42:20 -0400 Received: from mail-iw0-f173.google.com ([209.85.214.173]:61123) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QhIR0-0002tG-NA for qemu-devel@nongnu.org; Thu, 14 Jul 2011 05:42:18 -0400 Received: by mail-iw0-f173.google.com with SMTP id 3so42824iwn.4 for ; Thu, 14 Jul 2011 02:42:17 -0700 (PDT) From: Tsuneo Saito Date: Thu, 14 Jul 2011 18:41:39 +0900 Message-Id: <1310636503-8956-5-git-send-email-tsnsaito@gmail.com> In-Reply-To: <1310636503-8956-1-git-send-email-tsnsaito@gmail.com> References: <1310636503-8956-1-git-send-email-tsnsaito@gmail.com> Subject: [Qemu-devel] [PATCH v2 4/8] SPARC64: fp_disabled checks on stfa/stdfa/stqfa List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Tsuneo Saito stfa/stdfa/stqfa instructions should raise fp_disabled exceptions if %pstate.PEF==0 or %fprs.FEF==0. Signed-off-by: Tsuneo Saito --- target-sparc/translate.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index a5a8eaf..5f92dbb 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -4732,6 +4732,9 @@ static void disas_sparc_insn(DisasContext * dc) switch (xop) { #ifdef TARGET_SPARC64 case 0x34: /* V9 stfa */ + if (gen_trap_ifnofpu(dc, cpu_cond)) { + goto jmp_insn; + } gen_stf_asi(cpu_addr, insn, 4, rd); break; case 0x36: /* V9 stqfa */ @@ -4739,6 +4742,9 @@ static void disas_sparc_insn(DisasContext * dc) TCGv_i32 r_const; CHECK_FPU_FEATURE(dc, FLOAT128); + if (gen_trap_ifnofpu(dc, cpu_cond)) { + goto jmp_insn; + } r_const = tcg_const_i32(7); gen_helper_check_align(cpu_addr, r_const); tcg_temp_free_i32(r_const); @@ -4746,6 +4752,9 @@ static void disas_sparc_insn(DisasContext * dc) } break; case 0x37: /* V9 stdfa */ + if (gen_trap_ifnofpu(dc, cpu_cond)) { + goto jmp_insn; + } gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd)); break; case 0x3c: /* V9 casa */ -- 1.7.5.4