From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52275) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qji3O-0002FZ-E9 for qemu-devel@nongnu.org; Wed, 20 Jul 2011 21:28:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qji3B-0003sD-9G for qemu-devel@nongnu.org; Wed, 20 Jul 2011 21:27:53 -0400 Received: from cantor2.suse.de ([195.135.220.15]:58013 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qji39-0003qk-Pl for qemu-devel@nongnu.org; Wed, 20 Jul 2011 21:27:40 -0400 From: Alexander Graf Date: Thu, 21 Jul 2011 03:27:22 +0200 Message-Id: <1311211654-14326-12-git-send-email-agraf@suse.de> In-Reply-To: <1311211654-14326-1-git-send-email-agraf@suse.de> References: <1311211654-14326-1-git-send-email-agraf@suse.de> Subject: [Qemu-devel] [PATCH 11/23] PPC: E500: Use spin code for secondary CPUs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: QEMU-devel Developers Cc: Scott Wood When running with more than one CPU in -kernel mode, we need to have the secondary CPUs spin in a special u-boot compatible loop that reads out a so called "spin table" and checks for updates. This patch makes sure secondary CPUs use the spin code and execute it first thing when they execute. Signed-off-by: Alexander Graf --- hw/ppce500_mpc8544ds.c | 17 +++++++++++++---- 1 files changed, 13 insertions(+), 4 deletions(-) diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c index 7ce9bc7..0c6cdf2 100644 --- a/hw/ppce500_mpc8544ds.c +++ b/hw/ppce500_mpc8544ds.c @@ -227,6 +227,8 @@ static void mpc8544ds_init(ram_addr_t ram_size, { PCIBus *pci_bus; CPUState *env = NULL; + char *spin_filename; + uint64_t spin_entry; uint64_t elf_entry; uint64_t elf_lowaddr; target_phys_addr_t entry=0; @@ -242,6 +244,15 @@ static void mpc8544ds_init(ram_addr_t ram_size, struct boot_info *boot_info; CPUState *firstenv = NULL; + /* Register Memory */ + cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(NULL, + "mpc8544ds.ram", ram_size)); + + /* Load Spin Code */ + spin_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "ppc_spin.elf"); + load_elf(spin_filename, NULL, NULL, &spin_entry, + NULL, NULL, 1, ELF_MACHINE, 0); + /* Setup CPUs */ if (cpu_model == NULL) { cpu_model = "e500v2_v30"; @@ -276,6 +287,8 @@ static void mpc8544ds_init(ram_addr_t ram_size, /* Register reset handler */ boot_info = qemu_mallocz(sizeof(struct boot_info)); qemu_register_reset(mpc8544ds_cpu_reset, env); + boot_info->entry = spin_entry; + boot_info->dt_base = 0x7800000 + (i * 0x100); env->load_info = boot_info; } @@ -284,10 +297,6 @@ static void mpc8544ds_init(ram_addr_t ram_size, /* Fixup Memory size on a alignment boundary */ ram_size &= ~(RAM_SIZES_ALIGN - 1); - /* Register Memory */ - cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(NULL, - "mpc8544ds.ram", ram_size)); - /* MPIC */ mpic = mpic_init(MPC8544_MPIC_REGS_BASE, smp_cpus, irqs, NULL); -- 1.6.0.2