From: Alexander Graf <agraf@suse.de>
To: QEMU-devel Developers <qemu-devel@nongnu.org>
Cc: Scott Wood <scottwood@freescale.com>
Subject: [Qemu-devel] [PATCH 03/23] PPC: Add CPU definitions for up to 32 guest CPUs
Date: Thu, 21 Jul 2011 03:27:14 +0200 [thread overview]
Message-ID: <1311211654-14326-4-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1311211654-14326-1-git-send-email-agraf@suse.de>
All guest CPUs need to be specified in the device trees. Since removing nodes
is easy with FDT, but adding nodes is not, we just put 32 CPU nodes into the
device tree and remove them later on init when not used.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
pc-bios/mpc8544ds.dtb | Bin 2277 -> 9699 bytes
pc-bios/mpc8544ds.dts | 437 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 437 insertions(+), 0 deletions(-)
diff --git a/pc-bios/mpc8544ds.dtb b/pc-bios/mpc8544ds.dtb
index ae318b1fe83846cc2e133951a3666fcfcdf87f79..18667f87588e390018149e548468e1a119433eea 100644
GIT binary patch
literal 9699
zcmds7&5zqe6dzMaDNxwu`<qBhB|xz@fn-?_heQR$Wu>i<xFW}%-B|S(9;e;qR5)=1
ziT|KSPWvbH#+3{AMM%AIhYRq2Z#<5ZW^MJD8EN8qpYwh*9>>o!zg_+JFCnh|DTLS;
z;_XAazC(4J>K0Wh&d<buS+|#doszml*C)_EIJ~|;8V*1GQVYO;o@!^o=hn%I)`0v`
zs^|;84Bahh$BRNwNkt^f-lS`9SEW8W8Oy#dyGrJv7mbIbejl0(-QmT$dv)EX$>x*Y
z%n#Y;KDlK#;t{$yem3U-O1~Gy3k&Bky)E;@>phN7J299h<Oe#2J^(?*&^M^vt<nAp
zO~!YKRq21fLjMRM731%&CM)`^Mqi=!y&zQHG?GD$|0K14Rauz01w<@?zsITm&XoS)
zaaqDTV1em-9oG8%ZZ_8UTd`t%%vfwT)(={-0;e5Vhpkw#_U*trYQ_4PHCXprv39J%
z`e7^9%hq6}x0M=}b^kf|-?C%9e$<K;|LJyM^;)swUDFP%(^jl_C$j^q--`7qYq09K
zYBO)^o=sP+!Mey3@P4!oEAlHd7MuM(d_+hVSk_^ErY7HPtOHJ9&AhF{x@8a6LEF4;
z+k=%8*rs`X)*h^!z&2rh&K|6sz&2sUw>Tr;@MjYzum;PzXVVMzVC4k13G0jYVC4k1
z3F}MtVC4k12`j$28~KK>S59CJmUZj(6??F90^5Z3ReP{<0^5Z3HG8o71f^P!>+a##
zYw`_WubjX(&FdTXVC4k12`ly;jeNuBl@nNlW!*je)&^tceaTqHX?{v5^qk>)_hf~K
z@4{yP6?$y9x~&WW6*E@b)UNMgc30>L*%OQP@y)KI!Z?ehJ1uvQ;RoNh?o$=#_(Arp
z^*Nq%CYfpayvr==cV&m$$Z6l63uwlv^(r3xb`mw%8;z=5zQq0+i2$d<cLstAd_m`L
zs_#+7*p&S_xWY(}SGnt6?xdGG0x_9!ddQeQFHKE<;-O>8LVrBOsQ~gs1u;=^>Uj_5
z5yfD7m)ZuS9vghcLe)C>cGdA`dDcranYh#gi`X9D+$YQI%J0V{Gvh$soN-C>*d0gd
z)QjAC5k_GVN~O;-kcRFPF?Nnr)QdAd>fj#Fi~1P^9Va5wH<7{l1u@{C`*`p;gNcpj
z2*$A6qFU>#?~<L7VH74cnslA7^sNCEE|_EZIVTwz{=m%g2l%V|Wktp@k{q_Avt(ED
zcotS=h{^b+>rX^h#qdk}C7J23v|o~${z{!C*-C$A46C&OTg(U63*Oh^qvScasg3d<
zRq*;$??VCQURlxZQbq8l{9ziJ30uT*cIlt-FLW(w2lp;CjJ!*2(?9faA3=tS7!S_H
z9lC5$)%S=$OO;GOvJU;vIp1A;W~Mq{!{anN&18NnRB6uk;GtfL(?CYTPvguhLYyMm
z@q!?iO1Zv_A|-ZI_^mA4`gzqC`Z^GFuk}SBZ-u`6x*-1|m&YP-eb1jsHwqK!!dQe4
zaE#89n292c<&+K)xktJDW-b%|RL~>2M)^_d->lK9@Ctfn%LGSY+*lT~G!S%n$IWFV
z;RtX<?j^@`FbR;{FbU*|2$MqQ`8=bQS~cCw%Vkp37=D@*c^XAB7ds0zJu(Dve$vZk
qUJ}r-Vg1iM<>spJ^O}d)%iP#gH<wuqih~l`jVgk4UQhtVO#BbQm&eTj
delta 282
zcmaFt{Zvrn0`I@K3=AAk85kHW7#P?qfV2h>3j(nK5CZ{YE>PTIqsDQ@$;ahZFdmp(
zAn(n1eDWUoXwgeRX)PdT0%B$$W&z^6lXVo7f${+gxa1EgD9JIrL(&4W3<RJ?Ffvb4
z3>Opu3NRuGN=?pCOlDM?d`3|nX!;jLYes{~21?S5&XawVURg2RMN-ZIWP_Y00mLw;
o0mT>tfqW4755yq541gHu9c6Du=E-}MgBhb23#c$oHd9>-0N>d!9smFU
diff --git a/pc-bios/mpc8544ds.dts b/pc-bios/mpc8544ds.dts
index a88b47c..b127992 100644
--- a/pc-bios/mpc8544ds.dts
+++ b/pc-bios/mpc8544ds.dts
@@ -36,6 +36,443 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@1 {
+ device_type = "cpu";
+ reg = <0x1>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@2 {
+ device_type = "cpu";
+ reg = <0x2>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@3 {
+ device_type = "cpu";
+ reg = <0x3>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@4 {
+ device_type = "cpu";
+ reg = <0x4>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@5 {
+ device_type = "cpu";
+ reg = <0x5>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@6 {
+ device_type = "cpu";
+ reg = <0x6>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@7 {
+ device_type = "cpu";
+ reg = <0x7>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@8 {
+ device_type = "cpu";
+ reg = <0x8>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@9 {
+ device_type = "cpu";
+ reg = <0x9>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@a {
+ device_type = "cpu";
+ reg = <0xa>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@b {
+ device_type = "cpu";
+ reg = <0xb>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@c {
+ device_type = "cpu";
+ reg = <0xc>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@d {
+ device_type = "cpu";
+ reg = <0xd>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@e {
+ device_type = "cpu";
+ reg = <0xe>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@f {
+ device_type = "cpu";
+ reg = <0xf>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@10 {
+ device_type = "cpu";
+ reg = <0x10>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@11 {
+ device_type = "cpu";
+ reg = <0x11>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@12 {
+ device_type = "cpu";
+ reg = <0x12>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@13 {
+ device_type = "cpu";
+ reg = <0x13>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@14 {
+ device_type = "cpu";
+ reg = <0x14>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@15 {
+ device_type = "cpu";
+ reg = <0x15>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@16 {
+ device_type = "cpu";
+ reg = <0x16>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@17 {
+ device_type = "cpu";
+ reg = <0x17>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@18 {
+ device_type = "cpu";
+ reg = <0x18>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@19 {
+ device_type = "cpu";
+ reg = <0x19>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@1a {
+ device_type = "cpu";
+ reg = <0x1a>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@1b {
+ device_type = "cpu";
+ reg = <0x1b>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@1c {
+ device_type = "cpu";
+ reg = <0x1c>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@1d {
+ device_type = "cpu";
+ reg = <0x1d>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@1e {
+ device_type = "cpu";
+ reg = <0x1e>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,8544@1f {
+ device_type = "cpu";
+ reg = <0x1f>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
};
};
--
1.6.0.2
next prev parent reply other threads:[~2011-07-21 1:27 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-21 1:27 [Qemu-devel] [PATCH 00/23] SMP support for MPC8544DS Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 01/23] PPC: Add secondary CPU spinning code Alexander Graf
2011-07-21 16:38 ` Scott Wood
2011-07-21 16:49 ` Alexander Graf
2011-07-21 17:46 ` Scott Wood
2011-07-21 1:27 ` [Qemu-devel] [PATCH 02/23] PPC: Move openpic to target specific code compilation Alexander Graf
2011-07-21 1:27 ` Alexander Graf [this message]
2011-07-21 16:46 ` [Qemu-devel] [PATCH 03/23] PPC: Add CPU definitions for up to 32 guest CPUs Scott Wood
2011-07-21 16:54 ` Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 04/23] PPC: Add CPU local MMIO regions to MPIC Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 05/23] PPC: Extend MPIC MMIO range Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 06/23] PPC: Fix IPI support in MPIC Alexander Graf
2011-07-22 14:08 ` Elie Richa
2011-07-22 15:01 ` Alexander Graf
2011-07-22 16:37 ` Scott Wood
2011-07-21 1:27 ` [Qemu-devel] [PATCH 07/23] PPC: Remove cINT code from MPIC Alexander Graf
2011-07-21 16:49 ` Scott Wood
2011-07-21 16:52 ` Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 08/23] PPC: Bump MPIC up to 32 supported CPUs Alexander Graf
2011-07-22 14:10 ` Elie Richa
2011-07-22 15:01 ` Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 09/23] PPC: E500: create multiple envs Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 10/23] PPC: E500: Generate IRQ lines for many CPUs Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 11/23] PPC: E500: Use spin code for secondary CPUs Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 12/23] device tree: add nop_node Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 13/23] PPC: bamboo: Move host fdt copy to target Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 14/23] PPC: KVM: Add generic function to read host clockfreq Alexander Graf
2011-07-21 17:51 ` Scott Wood
2011-07-21 18:59 ` Alexander Graf
2011-07-21 19:06 ` Scott Wood
2011-07-21 1:27 ` [Qemu-devel] [PATCH 15/23] PPC: E500: Use generic kvm function for freq Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 16/23] PPC: E500: Remove mpc8544_copy_soc_cell Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 17/23] PPC: bamboo: Use kvm api for freq and clock frequencies Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 18/23] PPC: KVM: Remove kvmppc_read_host_property Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 19/23] PPC: KVM: Add stubs for kvm helper functions Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 20/23] PPC: E500: Update freqs for all CPUs Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 21/23] PPC: E500: Remove unneeded CPU nodes Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 22/23] PPC: E500: Update cpu-release-addr property in cpu nodes Alexander Graf
2011-07-21 1:27 ` [Qemu-devel] [PATCH 23/23] PPC: E500: Bump CPU count to 32 Alexander Graf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1311211654-14326-4-git-send-email-agraf@suse.de \
--to=agraf@suse.de \
--cc=qemu-devel@nongnu.org \
--cc=scottwood@freescale.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).