From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:51887) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qjv2b-00018l-Md for qemu-devel@nongnu.org; Thu, 21 Jul 2011 11:19:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qjuzz-00032z-Hx for qemu-devel@nongnu.org; Thu, 21 Jul 2011 11:17:19 -0400 Received: from mail-pv0-f173.google.com ([74.125.83.173]:36877) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qjuzz-00032p-9E for qemu-devel@nongnu.org; Thu, 21 Jul 2011 11:17:15 -0400 Received: by pvg3 with SMTP id 3so1492044pvg.4 for ; Thu, 21 Jul 2011 08:17:14 -0700 (PDT) From: Tsuneo Saito Date: Fri, 22 Jul 2011 00:16:30 +0900 Message-Id: <1311261393-47400-5-git-send-email-tsnsaito@gmail.com> In-Reply-To: <1311261393-47400-1-git-send-email-tsnsaito@gmail.com> References: <1311261393-47400-1-git-send-email-tsnsaito@gmail.com> Subject: [Qemu-devel] [PATCH 4/7] SPARC64: split cpu_get_phys_page_debug() from cpu_get_phys_page_nofault() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Tsuneo Saito This patch makes cpu_get_phys_page_debug() independent from cpu_get_phys_page_nofault() in advance of implementing nonfaulting load. This also modifies cpu_get_phys_page_nofault() to be compiled only on TARGET_SPARC64 because it is not required on SPARC32. Signed-off-by: Tsuneo Saito --- target-sparc/cpu.h | 2 ++ target-sparc/helper.c | 15 ++++++++++++++- 2 files changed, 16 insertions(+), 1 deletions(-) diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 348858e..f4eeff5 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -541,10 +541,12 @@ static inline int tlb_compare_context(const SparcTLBEntry *tlb, #if !defined(CONFIG_USER_ONLY) void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr, int is_write, int is_exec, int is_asi, int size); +#if defined(TARGET_SPARC64) target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, int mmu_idx); #endif +#endif int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); #define cpu_init cpu_sparc_init diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 9acbcae..cb8d706 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -746,6 +746,7 @@ static int cpu_sparc_get_phys_page(CPUState *env, target_phys_addr_t *phys, mmu_idx, &page_size); } +#if defined(TARGET_SPARC64) target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, int mmu_idx) { @@ -760,10 +761,22 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, return -1; return phys_addr; } +#endif target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) { - return cpu_get_phys_page_nofault(env, addr, cpu_mmu_index(env)); + target_phys_addr_t phys_addr; + int mmu_idx = cpu_mmu_index(env); + + if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 2, mmu_idx) != 0) { + if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 0, mmu_idx) != 0) { + return -1; + } + } + if (cpu_get_physical_page_desc(phys_addr) == IO_MEM_UNASSIGNED) { + return -1; + } + return phys_addr; } #endif -- 1.7.5.4