From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48826) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwJVU-0007xN-PB for qemu-devel@nongnu.org; Sat, 23 May 2015 20:11:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YwJVN-0003HZ-Qs for qemu-devel@nongnu.org; Sat, 23 May 2015 20:11:08 -0400 Received: from nm5-vm0.bullet.mail.tp2.yahoo.com ([203.188.200.216]:59827) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwJVN-0003H4-9E for qemu-devel@nongnu.org; Sat, 23 May 2015 20:11:01 -0400 Date: Sun, 24 May 2015 00:10:58 +0000 (UTC) From: =?UTF-8?B?5rWp5YCrIOmtjw==?= Message-ID: <1311292936.348274.1432426258425.JavaMail.yahoo@mail.yahoo.com> In-Reply-To: <5560FD66.4040400@twiddle.net> References: <5560FD66.4040400@twiddle.net> MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_348273_1483325644.1432426258423" Subject: Re: [Qemu-devel] What's the difference between "ld/st" and "qemu_ld/st" in TCG IR? Reply-To: =?UTF-8?B?5rWp5YCrIOmtjw==?= List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , "qemu-devel@nongnu.org" ------=_Part_348273_1483325644.1432426258423 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Dear Richard: Now I get it, thanks for the help! :-) =20 Richard Henderson =E6=96=BC 2015/5/24 (=E9=80=B1=E6= =97=A5) 6:21 AM =E5=AF=AB=E9=81=93=EF=B9=95 =20 On 05/23/2015 05:26 AM, =E6=B5=A9=E5=80=AB =E9=AD=8F wrote: > So there are some points that I hope you can help me out: > 1. Is every guest load/store instruction would be translated to qemu_ld/s= t IR? Yes. > 2. What about another TCG IR "ld/st"? What kind of guest instructions wou= ld > cause TCG generates that IRs and for what purpose? For instance, vector instructions are often implemented without TCG=20 temporaries, but instead using ld/st to load the data from the ENV pointer= =20 directly.=C2=A0 You can see that in the ARM and i386 targets. Otherwise, there are sometimes less-used system values that do not warrent = a=20 TCG temporary.=C2=A0 You can see that in the alpha target. r~ ------=_Part_348273_1483325644.1432426258423 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
Dear Richard:

Now I get it, thanks for the help! :-)
=




=
Richa= rd Henderson <rth@twiddle.net> =E6=96=BC 2015/5/24 (=E9=80=B1=E6=97= =A5) 6:21 AM =E5=AF=AB=E9=81=93=EF=B9=95


On 05/23/2015 05:26 AM, =E6=B5=A9=E5=80=AB =E9=AD= =8F wrote:
> So there are some points that I hope you = can help me out:
> 1. Is every guest load/store instru= ction would be translated to qemu_ld/st IR?

Yes.

> 2. What about another = TCG IR "ld/st"? What kind of guest instructions would
>= ; cause TCG generates that IRs and for what purpose?

For instance, vector instructions are often implemented with= out TCG
temporaries, but instead using ld/st to load the= data from the ENV pointer
directly.  You can see t= hat in the ARM and i386 targets.

Other= wise, there are sometimes less-used system values that do not warrent a TCG temporary.  You can see that in the alpha target.<= div class=3D"yqt7881444963" id=3D"yqtfd90548">


r~

=

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