From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:45297) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QoZwS-0004FB-67 for qemu-devel@nongnu.org; Wed, 03 Aug 2011 07:48:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QoZwR-0001hL-38 for qemu-devel@nongnu.org; Wed, 03 Aug 2011 07:48:52 -0400 Received: from gate.crashing.org ([63.228.1.57]:33575) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QoZwQ-0001hG-P8 for qemu-devel@nongnu.org; Wed, 03 Aug 2011 07:48:51 -0400 From: Benjamin Herrenschmidt In-Reply-To: <4E390642.5050402@redhat.com> References: <1312318249-7011-1-git-send-email-avi@redhat.com> <4E387353.9020806@twiddle.net> <4E3874F0.3040106@redhat.com> <4E3876FD.4030409@twiddle.net> <4E390642.5050402@redhat.com> Content-Type: text/plain; charset="UTF-8" Date: Wed, 03 Aug 2011 21:48:41 +1000 Message-ID: <1312372121.8598.1.camel@pasglop> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] memory: use signed arithmetic List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Jan Kiszka , kvm@vger.kernel.org, qemu-devel@nongnu.org, Richard Henderson On Wed, 2011-08-03 at 11:26 +0300, Avi Kivity wrote: > On 08/03/2011 01:15 AM, Richard Henderson wrote: > > On 08/02/2011 03:06 PM, Avi Kivity wrote: > > > I don't think there's any cpu which has a real 64-bit physical > > > address space? Don't they all truncate it? > > > > I don't know. You're right that x86_64 does, at 48 bits. > > The alpha system I'm trying to emulate does, at 50 bits. > > > > I guess if IBM agrees wrt p-series and z-series emulation, then > > I'd be ok, so long as you add a comment above that structure that > > says no existing hw implementation actually uses 63 address bits. > > Ben, can you confirm that pseries physical addresses are 63 bits wide or > smaller? > > IIRC zseries has no mmio, and Zettabyte machines are still rare. We are fine yes. We might grow to 50 bits but I doubt we'll ever do the full 64, especially since we have some hard-wired assumptions that in real mode (MMU off) the top 2 bits are ignored. Cheers, Ben.