From: David Gibson <david@gibson.dropbear.id.au>
To: agraf@suse.de
Cc: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 1/6] pseries: Bugfixes for interrupt numbering in XICS code
Date: Thu, 4 Aug 2011 17:02:14 +1000 [thread overview]
Message-ID: <1312441339-22477-2-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1312441339-22477-1-git-send-email-david@gibson.dropbear.id.au>
The implementation of the XICS interrupt controller contains several
(difficult to trigger) bugs due to the fact that we were not 100%
consistent with which irq numbering we used. In most places, global
numbers were used as handled by the presentation layer, however a few
functions took "local" numberings, that is the source number within
the interrupt source controller which is offset from the global
number. In most cases the function and its caller agreed on this, but
in a few cases it didn't.
This patch cleans this up by always using global numbering.
Translation to the local number is now always and only done when we
look up the individual interrupt source state structure. This should
remove the existing bugs and with luck reduce the chances of
re-introducing such bugs.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/xics.c | 17 ++++++++---------
1 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/xics.c b/hw/xics.c
index 13a1d25..93da4f6 100644
--- a/hw/xics.c
+++ b/hw/xics.c
@@ -187,17 +187,17 @@ static int ics_valid_irq(struct ics_state *ics, uint32_t nr)
&& (nr < (ics->offset + ics->nr_irqs));
}
-static void ics_set_irq_msi(void *opaque, int nr, int val)
+static void ics_set_irq_msi(void *opaque, int srcno, int val)
{
struct ics_state *ics = (struct ics_state *)opaque;
- struct ics_irq_state *irq = ics->irqs + nr;
+ struct ics_irq_state *irq = ics->irqs + srcno;
if (val) {
if (irq->priority == 0xff) {
irq->masked_pending = 1;
/* masked pending */ ;
} else {
- icp_irq(ics->icp, irq->server, nr + ics->offset, irq->priority);
+ icp_irq(ics->icp, irq->server, srcno + ics->offset, irq->priority);
}
}
}
@@ -229,7 +229,7 @@ static void ics_resend_msi(struct ics_state *ics)
static void ics_write_xive_msi(struct ics_state *ics, int nr, int server,
uint8_t priority)
{
- struct ics_irq_state *irq = ics->irqs + nr;
+ struct ics_irq_state *irq = ics->irqs + nr - ics->offset;
irq->server = server;
irq->priority = priority;
@@ -239,7 +239,7 @@ static void ics_write_xive_msi(struct ics_state *ics, int nr, int server,
}
irq->masked_pending = 0;
- icp_irq(ics->icp, server, nr + ics->offset, priority);
+ icp_irq(ics->icp, server, nr, priority);
}
static void ics_reject(struct ics_state *ics, int nr)
@@ -334,7 +334,7 @@ static void rtas_set_xive(sPAPREnvironment *spapr, uint32_t token,
return;
}
- ics_write_xive_msi(ics, nr - ics->offset, server, priority);
+ ics_write_xive_msi(ics, nr, server, priority);
rtas_st(rets, 0, 0); /* Success */
}
@@ -388,7 +388,7 @@ static void rtas_int_off(sPAPREnvironment *spapr, uint32_t token,
struct ics_irq_state *irq = xics->irqs + (nr - xics->offset);
irq->saved_priority = irq->priority;
- ics_write_xive_msi(xics, nr - xics->offset, irq->server, 0xff);
+ ics_write_xive_msi(xics, nr, irq->server, 0xff);
#endif
rtas_st(rets, 0, 0); /* Success */
@@ -418,8 +418,7 @@ static void rtas_int_on(sPAPREnvironment *spapr, uint32_t token,
#if 0
struct ics_irq_state *irq = xics->irqs + (nr - xics->offset);
- ics_write_xive_msi(xics, nr - xics->offset,
- irq->server, irq->saved_priority);
+ ics_write_xive_msi(xics, nr, irq->server, irq->saved_priority);
#endif
rtas_st(rets, 0, 0); /* Success */
--
1.7.5.4
next prev parent reply other threads:[~2011-08-04 7:02 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-04 7:02 [Qemu-devel] pseries machine updates David Gibson
2011-08-04 7:02 ` David Gibson [this message]
2011-08-04 7:02 ` [Qemu-devel] [PATCH 2/6] Implement POWER7's CFAR in TCG David Gibson
2011-08-10 15:10 ` Alexander Graf
2011-08-11 0:35 ` David Gibson
2011-08-04 7:02 ` [Qemu-devel] [PATCH 3/6] pseries: Add real mode debugging hcalls David Gibson
2011-08-10 15:19 ` Alexander Graf
2011-08-04 7:02 ` [Qemu-devel] [PATCH 4/6] pseries: Add a phandle to the xicp interrupt controller device tree node David Gibson
2011-08-04 7:02 ` [Qemu-devel] [PATCH 5/6] pseries: interrupt controller should not have a 'reg' property David Gibson
2011-08-04 7:02 ` [Qemu-devel] [PATCH 6/6] pseries: More complete WIMG validation in H_ENTER code David Gibson
2011-08-10 15:16 ` [Qemu-devel] pseries machine updates Alexander Graf
2011-08-10 15:24 ` Alexander Graf
2011-08-11 0:44 ` David Gibson
2011-08-31 9:18 ` Alexander Graf
2011-08-11 0:39 ` David Gibson
2011-08-31 9:17 ` Alexander Graf
2011-09-01 1:45 ` David Gibson
2011-09-02 13:20 ` Alexander Graf
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