From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:58302) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QpLVn-0006NN-FT for qemu-devel@nongnu.org; Fri, 05 Aug 2011 10:36:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QpLVm-0003Il-6B for qemu-devel@nongnu.org; Fri, 05 Aug 2011 10:36:31 -0400 Received: from smtp02.citrix.com ([66.165.176.63]:22308) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QpLVl-0003IY-Uh for qemu-devel@nongnu.org; Fri, 05 Aug 2011 10:36:30 -0400 From: Anthony PERARD Date: Fri, 5 Aug 2011 15:36:15 +0100 Message-ID: <1312554976-5822-1-git-send-email-anthony.perard@citrix.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH] e1000: Do reset when E1000_CTRL_RST bit is set. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: QEMU-devel Cc: Anthony PERARD Signed-off-by: Anthony PERARD --- hw/e1000.c | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-) diff --git a/hw/e1000.c b/hw/e1000.c index 96d84f9..a1388e9 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -150,6 +150,8 @@ static const char phy_regcap[0x20] = { [PHY_ID2] = PHY_R, [M88E1000_PHY_SPEC_STATUS] = PHY_R }; +static void e1000_reset(void *opaque); + static void ioport_map(PCIDevice *pci_dev, int region_num, pcibus_t addr, pcibus_t size, int type) @@ -202,8 +204,12 @@ rxbufsize(uint32_t v) static void set_ctrl(E1000State *s, int index, uint32_t val) { - /* RST is self clearing */ - s->mac_reg[CTRL] = val & ~E1000_CTRL_RST; + DBGOUT(IO, "set ctrl = %08x\n", val); + if (val & E1000_CTRL_RST) { + e1000_reset(s); + return; + } + s->mac_reg[CTRL] = val; } static void -- Anthony PERARD