From: Alexander Graf <agraf@suse.de>
To: qemu-devel Developers <qemu-devel@nongnu.org>
Cc: "Blue Swirl" <blauwirbel@gmail.com>,
"Andreas Färber" <andreas.faerber@web.de>,
"Kirill Batuzov" <batuzovk@ispras.ru>,
"David Gibson" <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PATCH] TCG: Add preprocessor guards for optional tcg ops
Date: Thu, 11 Aug 2011 12:50:39 +0200 [thread overview]
Message-ID: <1313059839-2445-1-git-send-email-agraf@suse.de> (raw)
While compiling current HEAD on a ppc64 box, I was confronted with the
following compile errors:
tcg/optimize.c: In function ‘tcg_constant_folding’:
tcg/optimize.c:546: error: ‘INDEX_op_not_i32’ undeclared (first use in this function)
tcg/optimize.c:546: error: (Each undeclared identifier is reported only once
tcg/optimize.c:546: error: for each function it appears in.)
tcg/optimize.c:546: error: ‘INDEX_op_not_i64’ undeclared (first use in this function)
tcg/optimize.c:573: error: ‘INDEX_op_ext32u_i64’ undeclared (first use in this function)
make[1]: *** [tcg/optimize.o] Error 1
Obviously, the optimize.c tries to use TCG opcode constants that are optional
and thus not defined in some targets, such as ppc64.
This patch guards them with the proper #ifdefs, so compilation works again.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
tcg/optimize.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 7eb5eb1..7b4954c 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -543,7 +543,11 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr,
gen_args += 2;
args += 2;
break;
+#if ((TCG_TARGET_REG_BITS == 32) && defined(TCG_TARGET_HAS_not_i32)) || \
+ ((TCG_TARGET_REG_BITS == 64) && defined(TCG_TARGET_HAS_not_i32) && \
+ defined(TCG_TARGET_HAS_not_i64))
CASE_OP_32_64(not):
+#endif
#ifdef TCG_TARGET_HAS_ext8s_i32
case INDEX_op_ext8s_i32:
#endif
@@ -568,8 +572,10 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr,
#ifdef TCG_TARGET_HAS_ext16u_i64
case INDEX_op_ext16u_i64:
#endif
-#if TCG_TARGET_REG_BITS == 64
+#if (TCG_TARGET_REG_BITS == 64) && defined(TCG_TARGET_HAS_ext32s_i64)
case INDEX_op_ext32s_i64:
+#endif
+#if (TCG_TARGET_REG_BITS == 64) && defined(TCG_TARGET_HAS_ext32u_i64)
case INDEX_op_ext32u_i64:
#endif
if (temps[args[1]].state == TCG_TEMP_CONST) {
--
1.6.0.2
next reply other threads:[~2011-08-11 10:50 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-11 10:50 Alexander Graf [this message]
2011-08-11 11:24 ` [Qemu-devel] [PATCH] TCG: Add preprocessor guards for optional tcg ops malc
2011-08-11 11:40 ` Alexander Graf
2011-08-11 12:28 ` Avi Kivity
2011-08-11 12:36 ` Alexander Graf
2011-08-11 12:58 ` Avi Kivity
2011-08-11 16:38 ` Blue Swirl
2011-08-11 18:14 ` Richard Henderson
2011-08-21 20:22 ` Alexander Graf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1313059839-2445-1-git-send-email-agraf@suse.de \
--to=agraf@suse.de \
--cc=andreas.faerber@web.de \
--cc=batuzovk@ispras.ru \
--cc=blauwirbel@gmail.com \
--cc=david@gibson.dropbear.id.au \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).