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* [Qemu-devel] [PATCH] TCG: Add preprocessor guards for optional tcg ops
@ 2011-08-11 10:50 Alexander Graf
  2011-08-11 11:24 ` malc
  0 siblings, 1 reply; 9+ messages in thread
From: Alexander Graf @ 2011-08-11 10:50 UTC (permalink / raw)
  To: qemu-devel Developers
  Cc: Blue Swirl, Andreas Färber, Kirill Batuzov, David Gibson

While compiling current HEAD on a ppc64 box, I was confronted with the
following compile errors:

  tcg/optimize.c: In function ‘tcg_constant_folding’:
  tcg/optimize.c:546: error: ‘INDEX_op_not_i32’ undeclared (first use in this function)
  tcg/optimize.c:546: error: (Each undeclared identifier is reported only once
  tcg/optimize.c:546: error: for each function it appears in.)
  tcg/optimize.c:546: error: ‘INDEX_op_not_i64’ undeclared (first use in this function)
  tcg/optimize.c:573: error: ‘INDEX_op_ext32u_i64’ undeclared (first use in this function)
  make[1]: *** [tcg/optimize.o] Error 1

Obviously, the optimize.c tries to use TCG opcode constants that are optional
and thus not defined in some targets, such as ppc64.

This patch guards them with the proper #ifdefs, so compilation works again.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 tcg/optimize.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/tcg/optimize.c b/tcg/optimize.c
index 7eb5eb1..7b4954c 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -543,7 +543,11 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr,
             gen_args += 2;
             args += 2;
             break;
+#if ((TCG_TARGET_REG_BITS == 32) && defined(TCG_TARGET_HAS_not_i32)) || \
+    ((TCG_TARGET_REG_BITS == 64) && defined(TCG_TARGET_HAS_not_i32) && \
+     defined(TCG_TARGET_HAS_not_i64))
         CASE_OP_32_64(not):
+#endif
 #ifdef TCG_TARGET_HAS_ext8s_i32
         case INDEX_op_ext8s_i32:
 #endif
@@ -568,8 +572,10 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr,
 #ifdef TCG_TARGET_HAS_ext16u_i64
         case INDEX_op_ext16u_i64:
 #endif
-#if TCG_TARGET_REG_BITS == 64
+#if (TCG_TARGET_REG_BITS == 64) && defined(TCG_TARGET_HAS_ext32s_i64)
         case INDEX_op_ext32s_i64:
+#endif
+#if (TCG_TARGET_REG_BITS == 64) && defined(TCG_TARGET_HAS_ext32u_i64)
         case INDEX_op_ext32u_i64:
 #endif
             if (temps[args[1]].state == TCG_TEMP_CONST) {
-- 
1.6.0.2

^ permalink raw reply related	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2011-08-21 20:22 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-08-11 10:50 [Qemu-devel] [PATCH] TCG: Add preprocessor guards for optional tcg ops Alexander Graf
2011-08-11 11:24 ` malc
2011-08-11 11:40   ` Alexander Graf
2011-08-11 12:28     ` Avi Kivity
2011-08-11 12:36       ` Alexander Graf
2011-08-11 12:58         ` Avi Kivity
2011-08-11 16:38           ` Blue Swirl
2011-08-11 18:14             ` Richard Henderson
2011-08-21 20:22               ` Alexander Graf

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