From: Bryce Lanham <blanham@gmail.com>
To: qemu-devel@nongnu.org
Cc: Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PATCH 063/111] m68k: some FPU debugging macros
Date: Wed, 17 Aug 2011 15:47:08 -0500 [thread overview]
Message-ID: <1313614076-28878-64-git-send-email-blanham@gmail.com> (raw)
In-Reply-To: <1313614076-28878-1-git-send-email-blanham@gmail.com>
From: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/helper.c | 69 +++++++++++++++++++++++++++++++++++++++++++------
1 files changed, 60 insertions(+), 9 deletions(-)
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 081e1d9..7dcac61 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -29,6 +29,17 @@
#include "helpers.h"
+#if 0
+#define DBG_FPU(...) do { fprintf(stderr, "0x%08x: ", env->pc); fprintf(stderr, __VA_ARGS__); } while(0)
+static inline long double LDOUBLE(floatx80 x)
+{
+ return *(long double *)&x;
+}
+#else
+#define DBG_FPU(...)
+#define LDOUBLE(x)
+#endif
+
#define SIGNBIT (1u << 31)
enum m68k_cpuid {
@@ -1009,12 +1020,6 @@ static const floatx80 fpu_rom[128] = {
[0x3f] = { .high = 0x7525, .low = 0xc46052028a20979bULL }, /* 10^4096 */
};
-void HELPER(const_FP0)(CPUState *env, uint32_t offset)
-{
- env->fp0h = fpu_rom[offset].high;
- env->fp0l = fpu_rom[offset].low;
-}
-
static inline floatx80 FP0_to_floatx80(CPUState *env)
{
floatx80 res;
@@ -1072,6 +1077,14 @@ static inline floatx80 FP1_to_floatx80(CPUState *env)
return res;
}
+void HELPER(const_FP0)(CPUState *env, uint32_t offset)
+{
+ env->fp0h = fpu_rom[offset].high;
+ env->fp0l = fpu_rom[offset].low;
+ DBG_FPU("ROM[0x%02x] %"PRIxFPH" %"PRIxFPL" %.17Lg\n",
+ offset, env->fp0h, env->fp0l, LDOUBLE(FP0_to_floatx80(env)));
+}
+
static inline void restore_precision_mode(CPUState *env)
{
int rounding_precision;
@@ -1118,6 +1131,8 @@ static inline void restore_rounding_mode(CPUState *env)
void HELPER(set_fpcr)(CPUState *env, uint32_t val)
{
+ DBG_FPU("set_fpcr %04x\n", val);
+
env->fpcr = val & 0xffff;
restore_precision_mode(env);
@@ -1128,8 +1143,11 @@ void HELPER(exts32_FP0)(CPUState *env)
{
floatx80 res;
+ DBG_FPU("exts32_FP0 %d\n", FP0_to_int32(env));
+
res = int32_to_floatx80(FP0_to_int32(env), &env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1137,6 +1155,7 @@ void HELPER(extf32_FP0)(CPUState *env)
{
floatx80 res;
+ DBG_FPU("extf32_FP0\n");
res = float32_to_floatx80(FP0_to_float32(env), &env->fp_status);
floatx80_to_FP0(env, res);
@@ -1145,8 +1164,12 @@ void HELPER(extf32_FP0)(CPUState *env)
void HELPER(extf64_FP0)(CPUState *env)
{
floatx80 res;
+ uint64_t val;
- res = float64_to_floatx80(FP0_to_float64(env), &env->fp_status);
+ val = FP0_to_float64(env);
+ DBG_FPU("extf64_FP0 0x%016"PRIx64", %g\n", val, *(double*)&val);
+ res = float64_to_floatx80(val, &env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1161,7 +1184,9 @@ void HELPER(reds32_FP0)(CPUState *env)
int32_t res;
val = FP0_to_floatx80(env);
+ DBG_FPU("reds32_FP0 %Lg\n", LDOUBLE(val));
res = floatx80_to_int32(val, &env->fp_status);
+ DBG_FPU(" = %d\n", res);
int32_to_FP0(env, res);
}
@@ -1171,6 +1196,7 @@ void HELPER(redf32_FP0)(CPUState *env)
floatx80 val;
float32 res;
+ DBG_FPU("redf32_FP0\n");
val = FP0_to_floatx80(env);
res = floatx80_to_float32(val, &env->fp_status);
@@ -1183,19 +1209,24 @@ void HELPER(redf64_FP0)(CPUState *env)
float64 res;
val = FP0_to_floatx80(env);
+ DBG_FPU("redf64_FP0 %Lg\n", LDOUBLE(val));
res = floatx80_to_float64(val, &env->fp_status);
+ DBG_FPU(" = %g\n", *(double*)&res);
float64_to_FP0(env, res);
}
void HELPER(redp96_FP0)(CPUState *env)
{
+ DBG_FPU("redp96_FP0\n");
}
void HELPER(iround_FP0)(CPUState *env)
{
floatx80 res;
+ DBG_FPU("iround_FP0\n");
+
res = floatx80_round_to_int(FP0_to_floatx80(env), &env->fp_status);
floatx80_to_FP0(env, res);
@@ -1205,6 +1236,8 @@ void HELPER(itrunc_FP0)(CPUState *env)
{
floatx80 res;
+ DBG_FPU("itrunc_FP0\n");
+
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
res = floatx80_round_to_int(FP0_to_floatx80(env), &env->fp_status);
restore_rounding_mode(env);
@@ -1216,6 +1249,7 @@ void HELPER(sqrt_FP0)(CPUState *env)
{
floatx80 res;
+ DBG_FPU("sqrt_FP0\n");
res = floatx80_sqrt(FP0_to_floatx80(env), &env->fp_status);
floatx80_to_FP0(env, res);
@@ -1225,6 +1259,7 @@ void HELPER(abs_FP0)(CPUState *env)
{
floatx80 res;
+ DBG_FPU("abs_FP0\n");
res = floatx80_abs(FP0_to_floatx80(env));
floatx80_to_FP0(env, res);
@@ -1234,6 +1269,7 @@ void HELPER(chs_FP0)(CPUState *env)
{
floatx80 res;
+ DBG_FPU("chs_FP0\n");
res = floatx80_chs(FP0_to_floatx80(env));
floatx80_to_FP0(env, res);
@@ -1243,8 +1279,11 @@ void HELPER(add_FP0_FP1)(CPUState *env)
{
floatx80 res;
+ DBG_FPU("add_FP0_FP1(%Lg,%Lg)\n", LDOUBLE(FP0_to_floatx80(env)),
+ LDOUBLE(FP1_to_floatx80(env)));
res = floatx80_add(FP0_to_floatx80(env), FP1_to_floatx80(env),
&env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1253,8 +1292,11 @@ void HELPER(sub_FP0_FP1)(CPUState *env)
{
floatx80 res;
- res = floatx80_sub(FP0_to_floatx80(env), FP1_to_floatx80(env),
+ DBG_FPU("sub_FP0 %Lg %Lg\n", LDOUBLE(FP0_to_floatx80(env)),
+ LDOUBLE(FP1_to_floatx80(env)));
+ res = floatx80_sub(FP1_to_floatx80(env), FP0_to_floatx80(env),
&env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1263,8 +1305,11 @@ void HELPER(mul_FP0_FP1)(CPUState *env)
{
floatx80 res;
+ DBG_FPU("mul_FP0_FP1 %Lg %Lg\n",
+ LDOUBLE(FP0_to_floatx80(env)), LDOUBLE(FP1_to_floatx80(env)));
res = floatx80_mul(FP0_to_floatx80(env), FP1_to_floatx80(env),
&env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1273,7 +1318,8 @@ void HELPER(div_FP0_FP1)(CPUState *env)
{
floatx80 res;
- res = floatx80_div(FP0_to_floatx80(env), FP1_to_floatx80(env),
+ DBG_FPU("div\n");
+ res = floatx80_div(FP1_to_floatx80(env), FP0_to_floatx80(env),
&env->fp_status);
floatx80_to_FP0(env, res);
@@ -1284,6 +1330,8 @@ void HELPER(fcmp_FP0_FP1)(CPUState *env)
/* ??? This may incorrectly raise exceptions. */
/* ??? Should flush denormals to zero. */
floatx80 res;
+ DBG_FPU("cmp_FP0_FP1 %Lg %Lg\n", LDOUBLE(FP1_to_floatx80(env)),
+ LDOUBLE(FP0_to_floatx80(env)));
res = floatx80_sub(FP1_to_floatx80(env), FP0_to_floatx80(env),
&env->fp_status);
if (floatx80_is_any_nan(res)) {
@@ -1295,6 +1343,7 @@ void HELPER(fcmp_FP0_FP1)(CPUState *env)
res = floatx80_chs(res);
}
}
+ DBG_FPU(" : %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1302,9 +1351,11 @@ uint32_t HELPER(compare_FP0)(CPUState *env)
{
uint32_t res;
+ DBG_FPU("compare_FP0 %Lg\n", LDOUBLE(FP0_to_floatx80(env)));
res = float64_compare_quiet(floatx80_to_float64(FP0_to_floatx80(env),
&env->fp_status),
float64_zero, &env->fp_status);
+ DBG_FPU(" = %d\n", res);
return res;
}
--
1.7.2.3
next prev parent reply other threads:[~2011-08-17 20:50 UTC|newest]
Thread overview: 125+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-17 20:46 [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 001/111] linux-user: Signals processing is not thread-safe Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 002/111] linux-user: add qemu-wrapper Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 003/111] linux-user: define default cpu model in configure instead of linux-user/main.c Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 004/111] linux-user: specify the cpu model during configure Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 005/111] linux-user,m68k: display default cpu Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 006/111] linux-user: define new environment variables Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 007/111] linux-user: define a script to set binfmt using debian flavored tools Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 008/111] linux-user: define default cpu model in configure instead of linux-user/main.c Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 009/111] m68k: add tcg_gen_debug_insn_start() Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 010/111] m68k: define m680x0 CPUs and features Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 011/111] m68k: add missing accessing modes for some instructions Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 012/111] m68k: add Motorola 680x0 family common instructions Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 013/111] m68k: add Scc instruction with memory operand Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 014/111] m68k: add DBcc instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 015/111] m68k: modify movem instruction to manage word Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 016/111] m68k: add 64bit divide Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 017/111] m68k: add 32bit and 64bit multiply Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 018/111] m68k: add word data size for suba/adda Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 019/111] m68k: add fpu Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 020/111] m68k: add "byte", "word" and memory shift Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 021/111] m68k: add "byte", "word" and memory rotate Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 022/111] m68k: add bitfield_mem, bitfield_reg Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 023/111] m68k: add variable offset/width to bitfield_reg/bitfield_mem Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 024/111] m68k: add cas Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 025/111] " Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 026/111] m68k: define fcntl constants Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 027/111] m68k: add DBcc instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 028/111] m68k: allow fpu to manage double data type Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 029/111] m68k: allow fpu to manage double data type with fmove to <ea> Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 030/111] m68k: add FScc instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 031/111] m68k: add single data type to gen_ea Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 032/111] m68k: add linkl instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 033/111] m68k: Add fmovecr Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 034/111] m68k: correct typo on f64_to_i32() return type Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 035/111] m68k: improve CC_OP_LOGIC Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 036/111] m68k: correct neg condition code flags computation Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 037/111] Correct invalid use of "const void *" with "const uint8_t *" Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 038/111] m68k: add EA support for negx Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 039/111] m68k: add abcd instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 040/111] m68k: add sbcd instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 041/111] mm68k: add nbcd instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 042/111] m68k: set X flag according size of operand Set X flag correctly for addsub, arith_im, addsubq Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 043/111] m68k: on 0 bit shift, don't update X flag Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 044/111] m68k: improve addx instructions Add (byte, word) opsize Add memory access Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 045/111] m68k: improve subx, negx instructions Add (byte, word) opsize Add memory access (subx) Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 046/111] m68k: improve asl/asr evaluate correclty the missing V flag Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 047/111] m68k: use read_imm1() when it is possible Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 048/111] m68k: correct shift side effect for roxrl and roxll Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 049/111] m68k: asl/asr, clear C flag if shift count is 0 Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 050/111] m68k: lsl/lsr, " Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 051/111] m68k: correct divs.w and divu.w Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 052/111] m68k: correct flags with negl Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 053/111] m68k: for bitfield opcodes, correct operands corruption Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 054/111] m68k: Added ULL to 64 bit integer in helper.c Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 055/111] m68k: Correct bfclr in register case Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 056/111] m68k-linux-user: add '--enable-emulop' Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 057/111] m68k: correctly compute divsl Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 058/111] m68k: correctly compute divul Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 059/111] m68k: add m68030 definition Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 060/111] m68k: remove dead code Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 061/111] m68k: remove useless file m68k-qreg.h Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 062/111] m68k: FPU rework (draft) Bryce Lanham
2011-08-17 20:47 ` Bryce Lanham [this message]
2011-08-17 20:47 ` [Qemu-devel] [PATCH 064/111] m68k: more tests Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 065/111] m68k: correct compute gen_bitfield_cc() Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 066/111] m68k: add fgetexp Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 067/111] m68k: add fscale Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 068/111] m68k: correct addsubq Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 069/111] m68k: add fetox and flogn Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 070/111] m68k: initialize FRegs, define pickNaN() Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 071/111] m68k: correct cmpa comparison datatype Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 072/111] m68k: add flog10 Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 073/111] m68k: add cmpm instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 074/111] m68k: add ftwotox instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 075/111] m68k: better fpu traces Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 076/111] m68k: register source operand is always in extended size Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 077/111] m68k: add facos instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 078/111] m68k: add ftan instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 079/111] m68k: add fsin instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 080/111] m68k: add fcos instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 081/111] m68k: correct fpcr update Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 082/111] m68k: add fmod instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 083/111] m68k: flush flags before negx instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 084/111] m68k: correct fmovemx FP registers order Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 085/111] m68k: add fatan instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 086/111] m68k: correct bfins instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 087/111] m68k: fcmp correctly compares infinity Bryce Lanham
2011-08-17 22:35 ` [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions Anthony Liguori
2011-08-17 23:30 ` Bryce Lanham
2011-08-17 23:36 ` Peter Maydell
2011-08-18 16:05 ` Michael Roth
2011-08-18 7:02 ` Laurent Vivier
2011-08-18 11:12 ` François Revol
2011-08-18 14:02 ` Laurent Vivier
2011-08-18 19:42 ` Natalia Portillo
2011-08-18 19:57 ` Laurent Vivier
2011-08-18 20:13 ` Natalia Portillo
2011-08-18 20:51 ` Laurent Vivier
2011-08-19 2:14 ` Natalia Portillo
2011-08-19 8:55 ` François Revol
2011-08-19 15:52 ` Natalia Portillo
2011-08-19 16:07 ` Laurent Vivier
2011-08-19 20:08 ` Anthony Liguori
2011-08-20 22:12 ` Rob Landley
2011-08-20 22:12 ` Rob Landley
2011-08-20 22:16 ` Rob Landley
2011-08-20 21:06 ` Rob Landley
2011-08-20 20:57 ` Rob Landley
2011-08-20 21:16 ` Laurent Vivier
2011-08-20 22:28 ` Rob Landley
2011-08-20 22:39 ` Rob Landley
2011-08-20 23:24 ` Rob Landley
2011-08-20 20:55 ` Rob Landley
2011-08-20 23:17 ` Natalia Portillo
2011-08-20 23:42 ` Rob Landley
2011-08-21 0:23 ` Natalia Portillo
2011-08-21 0:50 ` Rob Landley
2011-08-21 2:02 ` Natalia Portillo
2011-08-21 22:14 ` Rob Landley
2011-08-22 2:15 ` Natalia Portillo
2011-08-23 12:30 ` Rob Landley
2011-08-21 10:04 ` Laurent Vivier
2011-08-21 13:11 ` Natalia Portillo
2011-08-21 22:23 ` Rob Landley
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