From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:47634) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qtn44-0000K3-8q for qemu-devel@nongnu.org; Wed, 17 Aug 2011 16:50:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qtn42-0006zw-EJ for qemu-devel@nongnu.org; Wed, 17 Aug 2011 16:50:15 -0400 Received: from mail-gy0-f173.google.com ([209.85.160.173]:61488) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qtn42-0006dO-4F for qemu-devel@nongnu.org; Wed, 17 Aug 2011 16:50:14 -0400 Received: by mail-gy0-f173.google.com with SMTP id 12so1229686gyd.4 for ; Wed, 17 Aug 2011 13:50:08 -0700 (PDT) From: Bryce Lanham Date: Wed, 17 Aug 2011 15:47:15 -0500 Message-Id: <1313614076-28878-71-git-send-email-blanham@gmail.com> In-Reply-To: <1313614076-28878-1-git-send-email-blanham@gmail.com> References: <1313614076-28878-1-git-send-email-blanham@gmail.com> Subject: [Qemu-devel] [PATCH 070/111] m68k: initialize FRegs, define pickNaN() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Laurent Vivier From: Laurent Vivier Signed-off-by: Laurent Vivier --- fpu/softfloat-specialize.h | 20 ++++++++++++++++++++ target-m68k/helper.c | 13 ++++++++++++- 2 files changed, 32 insertions(+), 1 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index c165205..e051549 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -387,6 +387,26 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, return 1; } } +#elif defined(TARGET_M68K) +static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, + flag aIsLargerSignificand) +{ + /* If either operand, but not both operands, of an operation is a + * nonsignaling NAN, then that NAN is returned as the result. If both + * operands are nonsignaling NANs, then the destination operand + * nonsignaling NAN is returned as the result. + */ + + if (aIsSNaN) { + return 0; + } else if (bIsSNaN) { + return 1; + } else if (bIsQNaN) { + return 1; + } else { + return 0; + } +} #else static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, flag aIsLargerSignificand) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index f67bfba..14a6ae6 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -244,6 +244,8 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name) void cpu_reset(CPUM68KState *env) { + int i; + if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); log_cpu_state(env, 0); @@ -254,7 +256,16 @@ void cpu_reset(CPUM68KState *env) env->sr = 0x2700; #endif m68k_switch_sp(env); - /* ??? FP regs should be initialized to NaN. */ + + for (i = 0; i < 8; i++) { + env->fregs[i].l.upper = floatx80_default_nan_high; + env->fregs[i].l.lower = 0xffffffffffffffffULL; + } + env->fp0h = floatx80_default_nan_high; + env->fp0l = 0xffffffffffffffffULL; + env->fp1h = floatx80_default_nan_high; + env->fp1l = 0xffffffffffffffffULL; + env->cc_op = CC_OP_FLAGS; /* TODO: We should set PC from the interrupt vector. */ env->pc = 0; -- 1.7.2.3