From: Bryce Lanham <blanham@gmail.com>
To: qemu-devel@nongnu.org
Cc: Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PATCH 075/111] m68k: better fpu traces
Date: Wed, 17 Aug 2011 15:47:20 -0500 [thread overview]
Message-ID: <1313614076-28878-76-git-send-email-blanham@gmail.com> (raw)
In-Reply-To: <1313614076-28878-1-git-send-email-blanham@gmail.com>
From: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/helper.c | 136 +++++++++++++++++++++++++++++++------------------
1 files changed, 86 insertions(+), 50 deletions(-)
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 3f6a0a0..cccae97 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -30,12 +30,22 @@
#include "helpers.h"
#if 0
-#define DBG_FPU(...) do { fprintf(stderr, "0x%08x: ", env->pc); fprintf(stderr, __VA_ARGS__); } while(0)
+#define DBG_FPUH(...) do { fprintf(stderr, "0x%08x: ", env->pc); fprintf(stderr, __VA_ARGS__); } while(0)
+#define DBG_FPU(...) do { fprintf(stderr, __VA_ARGS__); } while(0)
+static inline float FLOAT(float32 x)
+{
+ return *(float *)&x;
+}
+static inline double DOUBLE(float64 x)
+{
+ return *(double *)&x;
+}
static inline long double LDOUBLE(floatx80 x)
{
return *(long double *)&x;
}
#else
+#define DBG_FPUH(...)
#define DBG_FPU(...)
#define LDOUBLE(x)
#endif
@@ -1092,7 +1102,7 @@ void HELPER(const_FP0)(CPUState *env, uint32_t offset)
{
env->fp0h = fpu_rom[offset].high;
env->fp0l = fpu_rom[offset].low;
- DBG_FPU("ROM[0x%02x] %"PRIxFPH" %"PRIxFPL" %.17Lg\n",
+ DBG_FPUH("ROM[0x%02x] %"PRIxFPH" %"PRIxFPL" %.17Lg\n",
offset, env->fp0h, env->fp0l, LDOUBLE(FP0_to_floatx80(env)));
}
@@ -1142,7 +1152,7 @@ static inline void restore_rounding_mode(CPUState *env)
void HELPER(set_fpcr)(CPUState *env, uint32_t val)
{
- DBG_FPU("set_fpcr %04x\n", val);
+ DBG_FPUH("set_fpcr %04x\n", val);
env->fpcr = val & 0xffff;
@@ -1154,11 +1164,11 @@ void HELPER(exts32_FP0)(CPUState *env)
{
floatx80 res;
- DBG_FPU("exts32_FP0 %d\n", FP0_to_int32(env));
+ DBG_FPUH("exts32_FP0 %d", FP0_to_int32(env));
res = int32_to_floatx80(FP0_to_int32(env), &env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1166,8 +1176,9 @@ void HELPER(extf32_FP0)(CPUState *env)
{
floatx80 res;
- DBG_FPU("extf32_FP0\n");
+ DBG_FPUH("extf32_FP0 %f", FLOAT(FP0_to_float32(env)));
res = float32_to_floatx80(FP0_to_float32(env), &env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1178,9 +1189,9 @@ void HELPER(extf64_FP0)(CPUState *env)
uint64_t val;
val = FP0_to_float64(env);
- DBG_FPU("extf64_FP0 0x%016"PRIx64", %g\n", val, *(double*)&val);
+ DBG_FPUH("extf64_FP0 0x%016"PRIx64", %g", val, *(double*)&val);
res = float64_to_floatx80(val, &env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1195,9 +1206,9 @@ void HELPER(reds32_FP0)(CPUState *env)
int32_t res;
val = FP0_to_floatx80(env);
- DBG_FPU("reds32_FP0 %Lg\n", LDOUBLE(val));
+ DBG_FPUH("reds32_FP0 %Lg", LDOUBLE(val));
res = floatx80_to_int32(val, &env->fp_status);
- DBG_FPU(" = %d\n", res);
+ DBG_FPU(" = %d\n", res);
int32_to_FP0(env, res);
}
@@ -1207,9 +1218,10 @@ void HELPER(redf32_FP0)(CPUState *env)
floatx80 val;
float32 res;
- DBG_FPU("redf32_FP0\n");
val = FP0_to_floatx80(env);
+ DBG_FPUH("redf32_FP0 %Lg", LDOUBLE(val));
res = floatx80_to_float32(val, &env->fp_status);
+ DBG_FPU(" = %f\n", FLOAT(res));
float32_to_FP0(env, res);
}
@@ -1220,25 +1232,29 @@ void HELPER(redf64_FP0)(CPUState *env)
float64 res;
val = FP0_to_floatx80(env);
- DBG_FPU("redf64_FP0 %Lg\n", LDOUBLE(val));
+ DBG_FPUH("redf64_FP0 %Lg", LDOUBLE(val));
res = floatx80_to_float64(val, &env->fp_status);
- DBG_FPU(" = %g\n", *(double*)&res);
+ DBG_FPU(" = %g\n", *(double*)&res);
float64_to_FP0(env, res);
}
void HELPER(redp96_FP0)(CPUState *env)
{
- DBG_FPU("redp96_FP0\n");
+ DBG_FPUH("redp96_FP0\n");
}
void HELPER(iround_FP0)(CPUState *env)
{
floatx80 res;
- DBG_FPU("iround_FP0\n");
+ res = FP0_to_floatx80(env);
- res = floatx80_round_to_int(FP0_to_floatx80(env), &env->fp_status);
+ DBG_FPUH("iround_FP0 %Lg", LDOUBLE(res));
+
+ res = floatx80_round_to_int(res, &env->fp_status);
+
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1247,12 +1263,15 @@ void HELPER(itrunc_FP0)(CPUState *env)
{
floatx80 res;
- DBG_FPU("itrunc_FP0\n");
+ res = FP0_to_floatx80(env);
+ DBG_FPUH("itrunc_FP0 %Lg", LDOUBLE(res));
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
- res = floatx80_round_to_int(FP0_to_floatx80(env), &env->fp_status);
+ res = floatx80_round_to_int(res, &env->fp_status);
restore_rounding_mode(env);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
+
floatx80_to_FP0(env, res);
}
@@ -1260,8 +1279,10 @@ void HELPER(sqrt_FP0)(CPUState *env)
{
floatx80 res;
- DBG_FPU("sqrt_FP0\n");
- res = floatx80_sqrt(FP0_to_floatx80(env), &env->fp_status);
+ res = FP0_to_floatx80(env);
+ DBG_FPUH("sqrt_FP0 %Lg", LDOUBLE(res));
+ res = floatx80_sqrt(res, &env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1273,13 +1294,15 @@ void HELPER(ln_FP0)(CPUState *env)
/* ln(x) = log2(x) / log2(e) */
- DBG_FPU("ln_FP0\n");
+ res = FP0_to_floatx80(env);
+ DBG_FPUH("ln_FP0 %Lg", LDOUBLE(res));
- f = floatx80_to_float64(FP0_to_floatx80(env), &env->fp_status);
+ f = floatx80_to_float64(res, &env->fp_status);
log2 = float64_log2(f, &env->fp_status);
res = floatx80_div(float64_to_floatx80(log2, &env->fp_status),
floatx80_log2e, &env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1291,7 +1314,7 @@ void HELPER(log10_FP0)(CPUState *env)
/* log10(x) = log2(x) / log2(10) */
- DBG_FPU("log10_FP0(%Lg)\n", LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPUH("log10_FP0 %Lg", LDOUBLE(FP0_to_floatx80(env)));
f = floatx80_to_float64(FP0_to_floatx80(env), &env->fp_status);
log2 = float64_log2(f, &env->fp_status);
@@ -1300,7 +1323,7 @@ void HELPER(log10_FP0)(CPUState *env)
res = floatx80_div(float64_to_floatx80(log2, &env->fp_status),
float64_to_floatx80(log210, &env->fp_status),
&env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1312,23 +1335,29 @@ void HELPER(exp_FP0)(CPUState *env)
/* exp(x) = exp2(x * log2(e)) */
- DBG_FPU("exp_FP0\n");
+ f = FP0_to_floatx80(env);
+
+ DBG_FPUH("exp_FP0 %Lg", LDOUBLE(f));
- f = floatx80_mul(FP0_to_floatx80(env), floatx80_log2e, &env->fp_status);
+ f = floatx80_mul(f, floatx80_log2e, &env->fp_status);
res = float32_exp2(floatx80_to_float32(f, &env->fp_status),
&env->fp_status);
+ DBG_FPU(" = %f\n", FLOAT(res));
floatx80_to_FP0(env, float32_to_floatx80(res, &env->fp_status));
}
void HELPER(exp2_FP0)(CPUState *env)
{
float32 res;
+ floatx80 f;
- DBG_FPU("exp_FP0\n");
+ f = FP0_to_floatx80(env);
+ DBG_FPUH("exp2_FP0 %Lg", LDOUBLE(f));
- res = float32_exp2(floatx80_to_float32(FP0_to_floatx80(env),
- &env->fp_status), &env->fp_status);
+ res = float32_exp2(floatx80_to_float32(f, &env->fp_status),
+ &env->fp_status);
+ DBG_FPU(" = %f\n", FLOAT(res));
floatx80_to_FP0(env, float32_to_floatx80(res, &env->fp_status));
}
@@ -1337,8 +1366,10 @@ void HELPER(abs_FP0)(CPUState *env)
{
floatx80 res;
- DBG_FPU("abs_FP0\n");
- res = floatx80_abs(FP0_to_floatx80(env));
+ res = FP0_to_floatx80(env);
+ DBG_FPUH("abs_FP0 %Lg", LDOUBLE(res));
+ res = floatx80_abs(res);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1347,8 +1378,10 @@ void HELPER(chs_FP0)(CPUState *env)
{
floatx80 res;
- DBG_FPU("chs_FP0\n");
- res = floatx80_chs(FP0_to_floatx80(env));
+ res = FP0_to_floatx80(env);
+ DBG_FPUH("chs_FP0 %Lg", LDOUBLE(res));
+ res = floatx80_chs(res);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1358,15 +1391,15 @@ void HELPER(getexp_FP0)(CPUState *env)
int32_t exp;
floatx80 res;
- DBG_FPU("getexp_FP0(%Lg)\n", LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPUH("getexp_FP0 %Lg", LDOUBLE(FP0_to_floatx80(env)));
- DBG_FPU(" fp0h 0x%08x fp0l 0x%016" PRIx64 "\n", env->fp0h, env->fp0l);
+ DBG_FPU(" fp0h 0x%08x fp0l 0x%016" PRIx64, env->fp0h, env->fp0l);
exp = (env->fp0h & 0x7fff) - 0x3fff;
res = int32_to_floatx80(exp, &env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1375,9 +1408,9 @@ void HELPER(scale_FP0_FP1)(CPUState *env)
int32_t scale;
int32_t exp;
- DBG_FPU("getexp_FP0(%Lg)\n", LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPUH("scale_FP0 %Lg", LDOUBLE(FP0_to_floatx80(env)));
- DBG_FPU(" fp0h 0x%08x fp0l 0x%016" PRIx64 "\n", env->fp0h, env->fp0l);
+ DBG_FPU(" fp0h 0x%08x fp0l 0x%016" PRIx64, env->fp0h, env->fp0l);
scale = floatx80_to_int32(FP0_to_floatx80(env), &env->fp_status);
@@ -1385,17 +1418,18 @@ void HELPER(scale_FP0_FP1)(CPUState *env)
env->fp0h = (env->fp1h & 0x8000) | (exp & 0x7fff);
env->fp0l = env->fp1l;
+ DBG_FPU(" = %Lg", LDOUBLE(FP0_to_floatx80(env)));
}
void HELPER(add_FP0_FP1)(CPUState *env)
{
floatx80 res;
- DBG_FPU("add_FP0_FP1(%Lg,%Lg)\n", LDOUBLE(FP0_to_floatx80(env)),
+ DBG_FPUH("add_FP0_FP1 %Lg %Lg", LDOUBLE(FP0_to_floatx80(env)),
LDOUBLE(FP1_to_floatx80(env)));
res = floatx80_add(FP0_to_floatx80(env), FP1_to_floatx80(env),
&env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1404,11 +1438,11 @@ void HELPER(sub_FP0_FP1)(CPUState *env)
{
floatx80 res;
- DBG_FPU("sub_FP0 %Lg %Lg\n", LDOUBLE(FP0_to_floatx80(env)),
+ DBG_FPUH("sub_FP0 %Lg %Lg", LDOUBLE(FP0_to_floatx80(env)),
LDOUBLE(FP1_to_floatx80(env)));
res = floatx80_sub(FP1_to_floatx80(env), FP0_to_floatx80(env),
&env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1417,11 +1451,11 @@ void HELPER(mul_FP0_FP1)(CPUState *env)
{
floatx80 res;
- DBG_FPU("mul_FP0_FP1 %Lg %Lg\n",
+ DBG_FPUH("mul_FP0_FP1 %Lg %Lg",
LDOUBLE(FP0_to_floatx80(env)), LDOUBLE(FP1_to_floatx80(env)));
res = floatx80_mul(FP0_to_floatx80(env), FP1_to_floatx80(env),
&env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1430,9 +1464,11 @@ void HELPER(div_FP0_FP1)(CPUState *env)
{
floatx80 res;
- DBG_FPU("div\n");
+ DBG_FPUH("div_FP0_FP1 %Lg %Lg",
+ LDOUBLE(FP0_to_floatx80(env)), LDOUBLE(FP1_to_floatx80(env)));
res = floatx80_div(FP1_to_floatx80(env), FP0_to_floatx80(env),
&env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1442,8 +1478,8 @@ void HELPER(fcmp_FP0_FP1)(CPUState *env)
/* ??? This may incorrectly raise exceptions. */
/* ??? Should flush denormals to zero. */
floatx80 res;
- DBG_FPU("cmp_FP0_FP1 %Lg %Lg\n", LDOUBLE(FP1_to_floatx80(env)),
- LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPUH("cmp_FP0_FP1 %Lg %Lg", LDOUBLE(FP0_to_floatx80(env)),
+ LDOUBLE(FP1_to_floatx80(env)));
res = floatx80_sub(FP1_to_floatx80(env), FP0_to_floatx80(env),
&env->fp_status);
if (floatx80_is_any_nan(res)) {
@@ -1455,7 +1491,7 @@ void HELPER(fcmp_FP0_FP1)(CPUState *env)
res = floatx80_chs(res);
}
}
- DBG_FPU(" : %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
floatx80_to_FP0(env, res);
}
@@ -1463,11 +1499,11 @@ uint32_t HELPER(compare_FP0)(CPUState *env)
{
uint32_t res;
- DBG_FPU("compare_FP0 %Lg\n", LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPUH("compare_FP0 %Lg", LDOUBLE(FP0_to_floatx80(env)));
res = float64_compare_quiet(floatx80_to_float64(FP0_to_floatx80(env),
&env->fp_status),
float64_zero, &env->fp_status);
- DBG_FPU(" = %d\n", res);
+ DBG_FPU(" = %d\n", res);
return res;
}
--
1.7.2.3
next prev parent reply other threads:[~2011-08-17 20:50 UTC|newest]
Thread overview: 125+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-17 20:46 [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 001/111] linux-user: Signals processing is not thread-safe Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 002/111] linux-user: add qemu-wrapper Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 003/111] linux-user: define default cpu model in configure instead of linux-user/main.c Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 004/111] linux-user: specify the cpu model during configure Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 005/111] linux-user,m68k: display default cpu Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 006/111] linux-user: define new environment variables Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 007/111] linux-user: define a script to set binfmt using debian flavored tools Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 008/111] linux-user: define default cpu model in configure instead of linux-user/main.c Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 009/111] m68k: add tcg_gen_debug_insn_start() Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 010/111] m68k: define m680x0 CPUs and features Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 011/111] m68k: add missing accessing modes for some instructions Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 012/111] m68k: add Motorola 680x0 family common instructions Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 013/111] m68k: add Scc instruction with memory operand Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 014/111] m68k: add DBcc instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 015/111] m68k: modify movem instruction to manage word Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 016/111] m68k: add 64bit divide Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 017/111] m68k: add 32bit and 64bit multiply Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 018/111] m68k: add word data size for suba/adda Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 019/111] m68k: add fpu Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 020/111] m68k: add "byte", "word" and memory shift Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 021/111] m68k: add "byte", "word" and memory rotate Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 022/111] m68k: add bitfield_mem, bitfield_reg Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 023/111] m68k: add variable offset/width to bitfield_reg/bitfield_mem Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 024/111] m68k: add cas Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 025/111] " Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 026/111] m68k: define fcntl constants Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 027/111] m68k: add DBcc instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 028/111] m68k: allow fpu to manage double data type Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 029/111] m68k: allow fpu to manage double data type with fmove to <ea> Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 030/111] m68k: add FScc instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 031/111] m68k: add single data type to gen_ea Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 032/111] m68k: add linkl instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 033/111] m68k: Add fmovecr Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 034/111] m68k: correct typo on f64_to_i32() return type Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 035/111] m68k: improve CC_OP_LOGIC Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 036/111] m68k: correct neg condition code flags computation Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 037/111] Correct invalid use of "const void *" with "const uint8_t *" Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 038/111] m68k: add EA support for negx Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 039/111] m68k: add abcd instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 040/111] m68k: add sbcd instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 041/111] mm68k: add nbcd instruction Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 042/111] m68k: set X flag according size of operand Set X flag correctly for addsub, arith_im, addsubq Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 043/111] m68k: on 0 bit shift, don't update X flag Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 044/111] m68k: improve addx instructions Add (byte, word) opsize Add memory access Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 045/111] m68k: improve subx, negx instructions Add (byte, word) opsize Add memory access (subx) Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 046/111] m68k: improve asl/asr evaluate correclty the missing V flag Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 047/111] m68k: use read_imm1() when it is possible Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 048/111] m68k: correct shift side effect for roxrl and roxll Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 049/111] m68k: asl/asr, clear C flag if shift count is 0 Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 050/111] m68k: lsl/lsr, " Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 051/111] m68k: correct divs.w and divu.w Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 052/111] m68k: correct flags with negl Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 053/111] m68k: for bitfield opcodes, correct operands corruption Bryce Lanham
2011-08-17 20:46 ` [Qemu-devel] [PATCH 054/111] m68k: Added ULL to 64 bit integer in helper.c Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 055/111] m68k: Correct bfclr in register case Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 056/111] m68k-linux-user: add '--enable-emulop' Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 057/111] m68k: correctly compute divsl Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 058/111] m68k: correctly compute divul Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 059/111] m68k: add m68030 definition Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 060/111] m68k: remove dead code Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 061/111] m68k: remove useless file m68k-qreg.h Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 062/111] m68k: FPU rework (draft) Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 063/111] m68k: some FPU debugging macros Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 064/111] m68k: more tests Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 065/111] m68k: correct compute gen_bitfield_cc() Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 066/111] m68k: add fgetexp Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 067/111] m68k: add fscale Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 068/111] m68k: correct addsubq Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 069/111] m68k: add fetox and flogn Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 070/111] m68k: initialize FRegs, define pickNaN() Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 071/111] m68k: correct cmpa comparison datatype Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 072/111] m68k: add flog10 Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 073/111] m68k: add cmpm instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 074/111] m68k: add ftwotox instruction Bryce Lanham
2011-08-17 20:47 ` Bryce Lanham [this message]
2011-08-17 20:47 ` [Qemu-devel] [PATCH 076/111] m68k: register source operand is always in extended size Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 077/111] m68k: add facos instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 078/111] m68k: add ftan instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 079/111] m68k: add fsin instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 080/111] m68k: add fcos instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 081/111] m68k: correct fpcr update Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 082/111] m68k: add fmod instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 083/111] m68k: flush flags before negx instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 084/111] m68k: correct fmovemx FP registers order Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 085/111] m68k: add fatan instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 086/111] m68k: correct bfins instruction Bryce Lanham
2011-08-17 20:47 ` [Qemu-devel] [PATCH 087/111] m68k: fcmp correctly compares infinity Bryce Lanham
2011-08-17 22:35 ` [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions Anthony Liguori
2011-08-17 23:30 ` Bryce Lanham
2011-08-17 23:36 ` Peter Maydell
2011-08-18 16:05 ` Michael Roth
2011-08-18 7:02 ` Laurent Vivier
2011-08-18 11:12 ` François Revol
2011-08-18 14:02 ` Laurent Vivier
2011-08-18 19:42 ` Natalia Portillo
2011-08-18 19:57 ` Laurent Vivier
2011-08-18 20:13 ` Natalia Portillo
2011-08-18 20:51 ` Laurent Vivier
2011-08-19 2:14 ` Natalia Portillo
2011-08-19 8:55 ` François Revol
2011-08-19 15:52 ` Natalia Portillo
2011-08-19 16:07 ` Laurent Vivier
2011-08-19 20:08 ` Anthony Liguori
2011-08-20 22:12 ` Rob Landley
2011-08-20 22:12 ` Rob Landley
2011-08-20 22:16 ` Rob Landley
2011-08-20 21:06 ` Rob Landley
2011-08-20 20:57 ` Rob Landley
2011-08-20 21:16 ` Laurent Vivier
2011-08-20 22:28 ` Rob Landley
2011-08-20 22:39 ` Rob Landley
2011-08-20 23:24 ` Rob Landley
2011-08-20 20:55 ` Rob Landley
2011-08-20 23:17 ` Natalia Portillo
2011-08-20 23:42 ` Rob Landley
2011-08-21 0:23 ` Natalia Portillo
2011-08-21 0:50 ` Rob Landley
2011-08-21 2:02 ` Natalia Portillo
2011-08-21 22:14 ` Rob Landley
2011-08-22 2:15 ` Natalia Portillo
2011-08-23 12:30 ` Rob Landley
2011-08-21 10:04 ` Laurent Vivier
2011-08-21 13:11 ` Natalia Portillo
2011-08-21 22:23 ` Rob Landley
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