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From: Bryce Lanham <blanham@gmail.com>
To: qemu-devel@nongnu.org
Cc: Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PATCH 092/111] m68k: gdb FP registers are 96 bits
Date: Wed, 17 Aug 2011 15:53:23 -0500	[thread overview]
Message-ID: <1313614410-29359-3-git-send-email-blanham@gmail.com> (raw)
In-Reply-To: <1313614410-29359-1-git-send-email-blanham@gmail.com>

From: Laurent Vivier <laurent@vivier.eu>

Native gdb remotely reads floating point registers using native (extended)
register size : 96 bits.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 gdb-xml/m68k-fp.xml  |   21 +++++++++++++++++++++
 target-m68k/helper.c |   45 ++++++++++++++++++++++++++++++++++++++++-----
 2 files changed, 61 insertions(+), 5 deletions(-)
 create mode 100644 gdb-xml/m68k-fp.xml

diff --git a/gdb-xml/m68k-fp.xml b/gdb-xml/m68k-fp.xml
new file mode 100644
index 0000000..64290d1
--- /dev/null
+++ b/gdb-xml/m68k-fp.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2008 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.coldfire.fp">
+  <reg name="fp0" bitsize="96" type="float" group="float"/>
+  <reg name="fp1" bitsize="96" type="float" group="float"/>
+  <reg name="fp2" bitsize="96" type="float" group="float"/>
+  <reg name="fp3" bitsize="96" type="float" group="float"/>
+  <reg name="fp4" bitsize="96" type="float" group="float"/>
+  <reg name="fp5" bitsize="96" type="float" group="float"/>
+  <reg name="fp6" bitsize="96" type="float" group="float"/>
+  <reg name="fp7" bitsize="96" type="float" group="float"/>
+
+  <reg name="fpcontrol" bitsize="32" group="float"/>
+  <reg name="fpstatus" bitsize="32" group="float"/>,
+  <reg name="fpiaddr" bitsize="32" type="code_ptr" group="float"/>
+</feature>
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index e1a73b8..1aef50f 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -137,7 +137,7 @@ void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf)
     }
 }
 
-static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
+static int cf_fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
 {
     if (n < 8) {
         float_status s;
@@ -152,7 +152,7 @@ static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
     return 0;
 }
 
-static int fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
+static int cf_fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
 {
     if (n < 8) {
         float_status s;
@@ -166,6 +166,36 @@ static int fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
     return 0;
 }
 
+static int m68k_fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
+{
+    if (n < 8) {
+        stw_be_p(mem_buf, env->fregs[n].l.upper);
+        memset(mem_buf + 2, 0, 2);
+        stq_be_p(mem_buf + 4, env->fregs[n].l.lower);
+        return 12;
+    }
+    if (n < 11) {
+        /* FP control registers (not implemented)  */
+        memset(mem_buf, 0, 4);
+        return 4;
+    }
+    return 0;
+}
+
+static int m68k_fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
+{
+    if (n < 8) {
+        env->fregs[n].l.upper = lduw_be_p(mem_buf);
+        env->fregs[n].l.lower = ldq_be_p(mem_buf + 4);
+        return 12;
+    }
+    if (n < 11) {
+        /* FP control registers (not implemented)  */
+        return 4;
+    }
+    return 0;
+}
+
 static void m68k_set_feature(CPUM68KState *env, int feature)
 {
     env->features |= (1u << feature);
@@ -298,11 +328,16 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model)
     }
 
     cpu_reset(env);
-    if (!inited && (m68k_feature (env, M68K_FEATURE_CF_FPU) ||
-                    m68k_feature (env, M68K_FEATURE_FPU))) {
-        gdb_register_coprocessor(env, fpu_gdb_get_reg, fpu_gdb_set_reg,
+    if (!inited) {
+    if (m68k_feature (env, M68K_FEATURE_CF_FPU)) {
+        gdb_register_coprocessor(env, cf_fpu_gdb_get_reg, cf_fpu_gdb_set_reg,
                                  11, "cf-fp.xml", 18);
     }
+    if (m68k_feature (env, M68K_FEATURE_FPU)) {
+        gdb_register_coprocessor(env, m68k_fpu_gdb_get_reg,
+				 m68k_fpu_gdb_set_reg, 11, "m68k-fp.xml", 18);
+    }
+    }
     qemu_init_vcpu(env);
     inited = 1;
     return env;
-- 
1.7.2.3

  parent reply	other threads:[~2011-08-17 20:53 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 091/111] m68k: don't call gdb_register_coprocessor() twice Bryce Lanham
2011-08-17 20:53 ` Bryce Lanham [this message]
2011-08-17 20:53 ` [Qemu-devel] [PATCH 093/111] m68k: add exg instruction Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 094/111] m68k: define floatx80_default_inf_high and floatx80_default_inf_low Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 095/111] m68k: add bkpt instruction Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 096/111] m68k: correctly convert floatx80<->long double Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 097/111] m68k: use expl() to compute exp_FP0() Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 098/111] m68k: use exp2l() to compute exp2_FP0() Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 099/111] m68k: use logl() to compute ln_FP0() Bryce Lanham

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