From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:51395) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qtn7N-0002cu-GR for qemu-devel@nongnu.org; Wed, 17 Aug 2011 16:53:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qtn7M-0007lR-D2 for qemu-devel@nongnu.org; Wed, 17 Aug 2011 16:53:41 -0400 Received: from mail-iy0-f171.google.com ([209.85.210.171]:44139) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qtn7M-0007ku-8g for qemu-devel@nongnu.org; Wed, 17 Aug 2011 16:53:40 -0400 Received: by mail-iy0-f171.google.com with SMTP id 13so2653863iyf.30 for ; Wed, 17 Aug 2011 13:53:40 -0700 (PDT) From: Bryce Lanham Date: Wed, 17 Aug 2011 15:53:23 -0500 Message-Id: <1313614410-29359-3-git-send-email-blanham@gmail.com> In-Reply-To: <1313614410-29359-1-git-send-email-blanham@gmail.com> References: <1313614410-29359-1-git-send-email-blanham@gmail.com> Subject: [Qemu-devel] [PATCH 092/111] m68k: gdb FP registers are 96 bits List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Laurent Vivier From: Laurent Vivier Native gdb remotely reads floating point registers using native (extended) register size : 96 bits. Signed-off-by: Laurent Vivier --- gdb-xml/m68k-fp.xml | 21 +++++++++++++++++++++ target-m68k/helper.c | 45 ++++++++++++++++++++++++++++++++++++++++----- 2 files changed, 61 insertions(+), 5 deletions(-) create mode 100644 gdb-xml/m68k-fp.xml diff --git a/gdb-xml/m68k-fp.xml b/gdb-xml/m68k-fp.xml new file mode 100644 index 0000000..64290d1 --- /dev/null +++ b/gdb-xml/m68k-fp.xml @@ -0,0 +1,21 @@ + + + + + + + + + + + + + + + , + + diff --git a/target-m68k/helper.c b/target-m68k/helper.c index e1a73b8..1aef50f 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -137,7 +137,7 @@ void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf) } } -static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n) +static int cf_fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n) { if (n < 8) { float_status s; @@ -152,7 +152,7 @@ static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n) return 0; } -static int fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n) +static int cf_fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n) { if (n < 8) { float_status s; @@ -166,6 +166,36 @@ static int fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n) return 0; } +static int m68k_fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n) +{ + if (n < 8) { + stw_be_p(mem_buf, env->fregs[n].l.upper); + memset(mem_buf + 2, 0, 2); + stq_be_p(mem_buf + 4, env->fregs[n].l.lower); + return 12; + } + if (n < 11) { + /* FP control registers (not implemented) */ + memset(mem_buf, 0, 4); + return 4; + } + return 0; +} + +static int m68k_fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n) +{ + if (n < 8) { + env->fregs[n].l.upper = lduw_be_p(mem_buf); + env->fregs[n].l.lower = ldq_be_p(mem_buf + 4); + return 12; + } + if (n < 11) { + /* FP control registers (not implemented) */ + return 4; + } + return 0; +} + static void m68k_set_feature(CPUM68KState *env, int feature) { env->features |= (1u << feature); @@ -298,11 +328,16 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model) } cpu_reset(env); - if (!inited && (m68k_feature (env, M68K_FEATURE_CF_FPU) || - m68k_feature (env, M68K_FEATURE_FPU))) { - gdb_register_coprocessor(env, fpu_gdb_get_reg, fpu_gdb_set_reg, + if (!inited) { + if (m68k_feature (env, M68K_FEATURE_CF_FPU)) { + gdb_register_coprocessor(env, cf_fpu_gdb_get_reg, cf_fpu_gdb_set_reg, 11, "cf-fp.xml", 18); } + if (m68k_feature (env, M68K_FEATURE_FPU)) { + gdb_register_coprocessor(env, m68k_fpu_gdb_get_reg, + m68k_fpu_gdb_set_reg, 11, "m68k-fp.xml", 18); + } + } qemu_init_vcpu(env); inited = 1; return env; -- 1.7.2.3