From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:51410) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qtn7Q-0002ll-7p for qemu-devel@nongnu.org; Wed, 17 Aug 2011 16:53:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qtn7O-0007lf-Cj for qemu-devel@nongnu.org; Wed, 17 Aug 2011 16:53:43 -0400 Received: from mail-iy0-f171.google.com ([209.85.210.171]:44139) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qtn7N-0007ku-Sl for qemu-devel@nongnu.org; Wed, 17 Aug 2011 16:53:42 -0400 Received: by mail-iy0-f171.google.com with SMTP id 13so2653863iyf.30 for ; Wed, 17 Aug 2011 13:53:41 -0700 (PDT) From: Bryce Lanham Date: Wed, 17 Aug 2011 15:53:24 -0500 Message-Id: <1313614410-29359-4-git-send-email-blanham@gmail.com> In-Reply-To: <1313614410-29359-1-git-send-email-blanham@gmail.com> References: <1313614410-29359-1-git-send-email-blanham@gmail.com> Subject: [Qemu-devel] [PATCH 093/111] m68k: add exg instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Laurent Vivier From: Laurent Vivier Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 33 ++++++++++++++++++++++++++++++++- 1 files changed, 32 insertions(+), 1 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index b749a76..8cb2728 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -2538,10 +2538,41 @@ DISAS_INSN(and) TCGv dest; TCGv addr; int opsize; + int exg_mode; + dest = tcg_temp_new(); + + /* exg */ + + exg_mode = insn & 0x1f8; + if (exg_mode == 0x140) { + /* exchange Dx and Dy */ + src = DREG(insn, 9); + reg = DREG(insn, 0); + tcg_gen_mov_i32(dest, src); + tcg_gen_mov_i32(src, reg); + tcg_gen_mov_i32(reg, dest); + return; + } else if (exg_mode == 0x148) { + /* exchange Ax and Ay */ + src = AREG(insn, 9); + reg = AREG(insn, 0); + tcg_gen_mov_i32(dest, src); + tcg_gen_mov_i32(src, reg); + tcg_gen_mov_i32(reg, dest); + return; + } else if (exg_mode == 0x188) { + /* exchange Dx and Ay */ + src = DREG(insn, 9); + reg = AREG(insn, 0); + tcg_gen_mov_i32(dest, src); + tcg_gen_mov_i32(src, reg); + tcg_gen_mov_i32(reg, dest); + return; + } + /* and */ opsize = insn_opsize(insn, 6); reg = DREG(insn, 9); - dest = tcg_temp_new(); if (insn & 0x100) { SRC_EA(src, opsize, -1, &addr); tcg_gen_and_i32(dest, src, reg); -- 1.7.2.3