* [Qemu-devel] [PATCH 091/111] m68k: don't call gdb_register_coprocessor() twice.
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
@ 2011-08-17 20:53 ` Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 092/111] m68k: gdb FP registers are 96 bits Bryce Lanham
` (7 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Bryce Lanham @ 2011-08-17 20:53 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
From: Laurent Vivier <laurent@vivier.eu>
On a clone(), cpu_copy() calls cpu_int() which tries to
register again gdb_register_coprocessor().
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/helper.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 4edbc90..e1a73b8 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -246,11 +246,6 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name)
}
register_m68k_insns(env);
- if (m68k_feature (env, M68K_FEATURE_CF_FPU) ||
- m68k_feature (env, M68K_FEATURE_FPU)) {
- gdb_register_coprocessor(env, fpu_gdb_get_reg, fpu_gdb_set_reg,
- 11, "cf-fp.xml", 18);
- }
/* TODO: Add [E]MAC registers. */
return 0;
}
@@ -292,7 +287,6 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model)
env = qemu_mallocz(sizeof(CPUM68KState));
cpu_exec_init(env);
if (!inited) {
- inited = 1;
m68k_tcg_init();
}
@@ -304,7 +298,13 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model)
}
cpu_reset(env);
+ if (!inited && (m68k_feature (env, M68K_FEATURE_CF_FPU) ||
+ m68k_feature (env, M68K_FEATURE_FPU))) {
+ gdb_register_coprocessor(env, fpu_gdb_get_reg, fpu_gdb_set_reg,
+ 11, "cf-fp.xml", 18);
+ }
qemu_init_vcpu(env);
+ inited = 1;
return env;
}
--
1.7.2.3
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Qemu-devel] [PATCH 092/111] m68k: gdb FP registers are 96 bits
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 091/111] m68k: don't call gdb_register_coprocessor() twice Bryce Lanham
@ 2011-08-17 20:53 ` Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 093/111] m68k: add exg instruction Bryce Lanham
` (6 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Bryce Lanham @ 2011-08-17 20:53 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
From: Laurent Vivier <laurent@vivier.eu>
Native gdb remotely reads floating point registers using native (extended)
register size : 96 bits.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
gdb-xml/m68k-fp.xml | 21 +++++++++++++++++++++
target-m68k/helper.c | 45 ++++++++++++++++++++++++++++++++++++++++-----
2 files changed, 61 insertions(+), 5 deletions(-)
create mode 100644 gdb-xml/m68k-fp.xml
diff --git a/gdb-xml/m68k-fp.xml b/gdb-xml/m68k-fp.xml
new file mode 100644
index 0000000..64290d1
--- /dev/null
+++ b/gdb-xml/m68k-fp.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2008 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.coldfire.fp">
+ <reg name="fp0" bitsize="96" type="float" group="float"/>
+ <reg name="fp1" bitsize="96" type="float" group="float"/>
+ <reg name="fp2" bitsize="96" type="float" group="float"/>
+ <reg name="fp3" bitsize="96" type="float" group="float"/>
+ <reg name="fp4" bitsize="96" type="float" group="float"/>
+ <reg name="fp5" bitsize="96" type="float" group="float"/>
+ <reg name="fp6" bitsize="96" type="float" group="float"/>
+ <reg name="fp7" bitsize="96" type="float" group="float"/>
+
+ <reg name="fpcontrol" bitsize="32" group="float"/>
+ <reg name="fpstatus" bitsize="32" group="float"/>,
+ <reg name="fpiaddr" bitsize="32" type="code_ptr" group="float"/>
+</feature>
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index e1a73b8..1aef50f 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -137,7 +137,7 @@ void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf)
}
}
-static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
+static int cf_fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
{
if (n < 8) {
float_status s;
@@ -152,7 +152,7 @@ static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
-static int fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
+static int cf_fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
{
if (n < 8) {
float_status s;
@@ -166,6 +166,36 @@ static int fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
+static int m68k_fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
+{
+ if (n < 8) {
+ stw_be_p(mem_buf, env->fregs[n].l.upper);
+ memset(mem_buf + 2, 0, 2);
+ stq_be_p(mem_buf + 4, env->fregs[n].l.lower);
+ return 12;
+ }
+ if (n < 11) {
+ /* FP control registers (not implemented) */
+ memset(mem_buf, 0, 4);
+ return 4;
+ }
+ return 0;
+}
+
+static int m68k_fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
+{
+ if (n < 8) {
+ env->fregs[n].l.upper = lduw_be_p(mem_buf);
+ env->fregs[n].l.lower = ldq_be_p(mem_buf + 4);
+ return 12;
+ }
+ if (n < 11) {
+ /* FP control registers (not implemented) */
+ return 4;
+ }
+ return 0;
+}
+
static void m68k_set_feature(CPUM68KState *env, int feature)
{
env->features |= (1u << feature);
@@ -298,11 +328,16 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model)
}
cpu_reset(env);
- if (!inited && (m68k_feature (env, M68K_FEATURE_CF_FPU) ||
- m68k_feature (env, M68K_FEATURE_FPU))) {
- gdb_register_coprocessor(env, fpu_gdb_get_reg, fpu_gdb_set_reg,
+ if (!inited) {
+ if (m68k_feature (env, M68K_FEATURE_CF_FPU)) {
+ gdb_register_coprocessor(env, cf_fpu_gdb_get_reg, cf_fpu_gdb_set_reg,
11, "cf-fp.xml", 18);
}
+ if (m68k_feature (env, M68K_FEATURE_FPU)) {
+ gdb_register_coprocessor(env, m68k_fpu_gdb_get_reg,
+ m68k_fpu_gdb_set_reg, 11, "m68k-fp.xml", 18);
+ }
+ }
qemu_init_vcpu(env);
inited = 1;
return env;
--
1.7.2.3
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Qemu-devel] [PATCH 093/111] m68k: add exg instruction
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 091/111] m68k: don't call gdb_register_coprocessor() twice Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 092/111] m68k: gdb FP registers are 96 bits Bryce Lanham
@ 2011-08-17 20:53 ` Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 094/111] m68k: define floatx80_default_inf_high and floatx80_default_inf_low Bryce Lanham
` (5 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Bryce Lanham @ 2011-08-17 20:53 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
From: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/translate.c | 33 ++++++++++++++++++++++++++++++++-
1 files changed, 32 insertions(+), 1 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index b749a76..8cb2728 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2538,10 +2538,41 @@ DISAS_INSN(and)
TCGv dest;
TCGv addr;
int opsize;
+ int exg_mode;
+ dest = tcg_temp_new();
+
+ /* exg */
+
+ exg_mode = insn & 0x1f8;
+ if (exg_mode == 0x140) {
+ /* exchange Dx and Dy */
+ src = DREG(insn, 9);
+ reg = DREG(insn, 0);
+ tcg_gen_mov_i32(dest, src);
+ tcg_gen_mov_i32(src, reg);
+ tcg_gen_mov_i32(reg, dest);
+ return;
+ } else if (exg_mode == 0x148) {
+ /* exchange Ax and Ay */
+ src = AREG(insn, 9);
+ reg = AREG(insn, 0);
+ tcg_gen_mov_i32(dest, src);
+ tcg_gen_mov_i32(src, reg);
+ tcg_gen_mov_i32(reg, dest);
+ return;
+ } else if (exg_mode == 0x188) {
+ /* exchange Dx and Ay */
+ src = DREG(insn, 9);
+ reg = AREG(insn, 0);
+ tcg_gen_mov_i32(dest, src);
+ tcg_gen_mov_i32(src, reg);
+ tcg_gen_mov_i32(reg, dest);
+ return;
+ }
+ /* and */
opsize = insn_opsize(insn, 6);
reg = DREG(insn, 9);
- dest = tcg_temp_new();
if (insn & 0x100) {
SRC_EA(src, opsize, -1, &addr);
tcg_gen_and_i32(dest, src, reg);
--
1.7.2.3
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Qemu-devel] [PATCH 094/111] m68k: define floatx80_default_inf_high and floatx80_default_inf_low
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
` (2 preceding siblings ...)
2011-08-17 20:53 ` [Qemu-devel] [PATCH 093/111] m68k: add exg instruction Bryce Lanham
@ 2011-08-17 20:53 ` Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 095/111] m68k: add bkpt instruction Bryce Lanham
` (4 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Bryce Lanham @ 2011-08-17 20:53 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
From: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
fpu/softfloat.c | 38 ++++++++++++++++++++++++++------------
fpu/softfloat.h | 8 ++++++++
2 files changed, 34 insertions(+), 12 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 7951a0e..dbce683 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -768,7 +768,9 @@ static floatx80
) {
return packFloatx80( zSign, 0x7FFE, ~ roundMask );
}
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign,
+ floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( zExp <= 0 ) {
isTiny =
@@ -1583,7 +1585,9 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM )
aSign = extractFloat32Sign( a );
if ( aExp == 0xFF ) {
if ( aSig ) return commonNaNToFloatx80( float32ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
- return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( aSign,
+ floatx80_default_inf_high,
+ floatx80_default_inf_low);
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
@@ -2924,7 +2928,9 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM )
aSign = extractFloat64Sign( a );
if ( aExp == 0x7FF ) {
if ( aSig ) return commonNaNToFloatx80( float64ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
- return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( aSign,
+ floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
@@ -3870,8 +3876,8 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM )
if ( shiftCount ) {
float_raise( float_flag_invalid STATUS_VAR);
if ( ! aSign
- || ( ( aExp == 0x7FFF )
- && ( aSig != LIT64( 0x8000000000000000 ) ) )
+ || ( ( aExp == floatx80_default_inf_high )
+ && ( aSig != floatx80_default_inf_low ) )
) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
@@ -4114,7 +4120,9 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM
else if ( expDiff < 0 ) {
if ( bExp == 0x7FFF ) {
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign,
+ floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( aExp == 0 ) ++expDiff;
shift64ExtraRightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
@@ -4191,7 +4199,8 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM
bExpBigger:
if ( bExp == 0x7FFF ) {
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
- return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign ^ 1, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( aExp == 0 ) ++expDiff;
shift128RightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
@@ -4285,7 +4294,8 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM )
return propagateFloatx80NaN( a, b STATUS_VAR );
}
if ( ( bExp | bSig ) == 0 ) goto invalid;
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( bExp == 0x7FFF ) {
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
@@ -4296,7 +4306,8 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM )
z.high = floatx80_default_nan_high;
return z;
}
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign, floatx80_default_inf_high,
+ floatx80_default_inf_high );
}
if ( aExp == 0 ) {
if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
@@ -4345,7 +4356,8 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM )
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
goto invalid;
}
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( bExp == 0x7FFF ) {
if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
@@ -4361,7 +4373,8 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM )
return z;
}
float_raise( float_flag_divbyzero STATUS_VAR);
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( zSign, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
}
@@ -5071,7 +5084,8 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM )
if ( aSig0 | aSig1 ) {
return commonNaNToFloatx80( float128ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
}
- return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ return packFloatx80( aSign, floatx80_default_inf_high,
+ floatx80_default_inf_low );
}
if ( aExp == 0 ) {
if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index 9ff6b4d..7a1fa7e 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -541,6 +541,14 @@ INLINE int floatx80_is_any_nan(floatx80 a)
*----------------------------------------------------------------------------*/
extern const floatx80 floatx80_default_nan;
+#if defined(TARGET_M68K)
+#define floatx80_default_inf_high 0x7FFF
+#define floatx80_default_inf_low LIT64( 0x0000000000000000 )
+#else
+#define floatx80_default_inf_high 0x7FFF
+#define floatx80_default_inf_low LIT64( 0x8000000000000000 )
+#endif
+
/*----------------------------------------------------------------------------
| Software IEC/IEEE quadruple-precision conversion routines.
*----------------------------------------------------------------------------*/
--
1.7.2.3
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Qemu-devel] [PATCH 095/111] m68k: add bkpt instruction
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
` (3 preceding siblings ...)
2011-08-17 20:53 ` [Qemu-devel] [PATCH 094/111] m68k: define floatx80_default_inf_high and floatx80_default_inf_low Bryce Lanham
@ 2011-08-17 20:53 ` Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 096/111] m68k: correctly convert floatx80<->long double Bryce Lanham
` (3 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Bryce Lanham @ 2011-08-17 20:53 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
From: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/translate.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 8cb2728..0a14597 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2045,6 +2045,11 @@ DISAS_INSN(swap)
gen_logic_cc(s, reg, OS_LONG);
}
+DISAS_INSN(bkpt)
+{
+ gen_exception(s, s->pc - 2, EXCP_DEBUG);
+}
+
DISAS_INSN(pea)
{
TCGv tmp;
@@ -4403,6 +4408,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(pea, 4840, ffc0, M68000);
INSN(swap, 4840, fff8, CF_ISA_A);
INSN(swap, 4840, fff8, M68000);
+ INSN(bkpt, 4848, fff8, M68000);
INSN(movem, 48c0, fbc0, CF_ISA_A);
INSN(movem, 48c0, fbc0, M68000);
INSN(ext, 4880, fff8, CF_ISA_A);
--
1.7.2.3
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Qemu-devel] [PATCH 096/111] m68k: correctly convert floatx80<->long double
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
` (4 preceding siblings ...)
2011-08-17 20:53 ` [Qemu-devel] [PATCH 095/111] m68k: add bkpt instruction Bryce Lanham
@ 2011-08-17 20:53 ` Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 097/111] m68k: use expl() to compute exp_FP0() Bryce Lanham
` (2 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Bryce Lanham @ 2011-08-17 20:53 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
From: Laurent Vivier <laurent@vivier.eu>
manage correctly NaN and infinity.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/helper.c | 157 +++++++++++++++++++++++++++++--------------------
1 files changed, 93 insertions(+), 64 deletions(-)
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 1aef50f..17f2d48 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -44,14 +44,6 @@ static inline double DOUBLE(float64 x)
{
return *(double *)&x;
}
-static inline long double LDOUBLE(floatx80 x)
-{
- return *(long double *)&x;
-}
-static inline floatx80 FLOATx80(long double x)
-{
- return *(floatx80 *)&x;
-}
#define SIGNBIT (1u << 31)
@@ -1135,12 +1127,48 @@ static inline floatx80 FP1_to_floatx80(CPUState *env)
return res;
}
+static inline long double floatx80_to_ldouble(floatx80 val)
+{
+ if (floatx80_is_infinity(val)) {
+ if (floatx80_is_neg(val)) {
+ return -__builtin_infl();
+ }
+ return __builtin_infl();
+ }
+ if (floatx80_is_any_nan(val)) {
+ char low[20];
+ sprintf(low, "0x%016"PRIx64, val.low);
+
+ return nanl(low);
+ }
+
+ return *(long double *)&val;
+}
+
+static inline floatx80 ldouble_to_floatx80(long double val)
+{
+ floatx80 res;
+
+ if (isinf(val)) {
+ res.high = floatx80_default_nan.high;
+ res.low = 0;
+ }
+ if (isinf(val) < 0) {
+ res.high |= 0x8000;
+ }
+ if (isnan(val)) {
+ res.high = floatx80_default_nan.high;
+ res.low = *(uint64_t*)((char *)&val + 4);
+ }
+ return *(floatx80*)&val;
+}
+
void HELPER(const_FP0)(CPUState *env, uint32_t offset)
{
env->fp0h = fpu_rom[offset].high;
env->fp0l = fpu_rom[offset].low;
DBG_FPUH("ROM[0x%02x] %"PRIxFPH" %"PRIxFPL" %.17Lg\n",
- offset, env->fp0h, env->fp0l, LDOUBLE(FP0_to_floatx80(env)));
+ offset, env->fp0h, env->fp0l, floatx80_to_ldouble(FP0_to_floatx80(env)));
}
static inline void restore_precision_mode(CPUState *env)
@@ -1205,7 +1233,7 @@ void HELPER(exts32_FP0)(CPUState *env)
res = int32_to_floatx80(FP0_to_int32(env), &env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1215,7 +1243,7 @@ void HELPER(extf32_FP0)(CPUState *env)
DBG_FPUH("extf32_FP0 %f", FLOAT(FP0_to_float32(env)));
res = float32_to_floatx80(FP0_to_float32(env), &env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1228,7 +1256,7 @@ void HELPER(extf64_FP0)(CPUState *env)
val = FP0_to_float64(env);
DBG_FPUH("extf64_FP0 0x%016"PRIx64", %g", val, *(double*)&val);
res = float64_to_floatx80(val, &env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1243,7 +1271,8 @@ void HELPER(reds32_FP0)(CPUState *env)
int32_t res;
val = FP0_to_floatx80(env);
- DBG_FPUH("reds32_FP0 %Lg", LDOUBLE(val));
+ DBG_FPUH("reds32_FP0 %Lg (%08x %016"PRIx64")",
+ floatx80_to_ldouble(val), env->fp0h, env->fp0l);
res = floatx80_to_int32(val, &env->fp_status);
DBG_FPU(" = %d\n", res);
@@ -1256,7 +1285,7 @@ void HELPER(redf32_FP0)(CPUState *env)
float32 res;
val = FP0_to_floatx80(env);
- DBG_FPUH("redf32_FP0 %Lg", LDOUBLE(val));
+ DBG_FPUH("redf32_FP0 %Lg", floatx80_to_ldouble(val));
res = floatx80_to_float32(val, &env->fp_status);
DBG_FPU(" = %f\n", FLOAT(res));
@@ -1269,7 +1298,7 @@ void HELPER(redf64_FP0)(CPUState *env)
float64 res;
val = FP0_to_floatx80(env);
- DBG_FPUH("redf64_FP0 %Lg", LDOUBLE(val));
+ DBG_FPUH("redf64_FP0 %Lg", floatx80_to_ldouble(val));
res = floatx80_to_float64(val, &env->fp_status);
DBG_FPU(" = %g\n", *(double*)&res);
@@ -1287,11 +1316,11 @@ void HELPER(iround_FP0)(CPUState *env)
res = FP0_to_floatx80(env);
- DBG_FPUH("iround_FP0 %Lg", LDOUBLE(res));
+ DBG_FPUH("iround_FP0 %Lg", floatx80_to_ldouble(res));
res = floatx80_round_to_int(res, &env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1301,13 +1330,13 @@ void HELPER(itrunc_FP0)(CPUState *env)
floatx80 res;
res = FP0_to_floatx80(env);
- DBG_FPUH("itrunc_FP0 %Lg", LDOUBLE(res));
+ DBG_FPUH("itrunc_FP0 %Lg", floatx80_to_ldouble(res));
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
res = floatx80_round_to_int(res, &env->fp_status);
restore_rounding_mode(env);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1317,9 +1346,9 @@ void HELPER(sqrt_FP0)(CPUState *env)
floatx80 res;
res = FP0_to_floatx80(env);
- DBG_FPUH("sqrt_FP0 %Lg", LDOUBLE(res));
+ DBG_FPUH("sqrt_FP0 %Lg", floatx80_to_ldouble(res));
res = floatx80_sqrt(res, &env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1332,14 +1361,14 @@ void HELPER(ln_FP0)(CPUState *env)
/* ln(x) = log2(x) / log2(e) */
res = FP0_to_floatx80(env);
- DBG_FPUH("ln_FP0 %Lg", LDOUBLE(res));
+ DBG_FPUH("ln_FP0 %Lg", floatx80_to_ldouble(res));
f = floatx80_to_float64(res, &env->fp_status);
log2 = float64_log2(f, &env->fp_status);
res = floatx80_div(float64_to_floatx80(log2, &env->fp_status),
floatx80_log2e, &env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1351,7 +1380,7 @@ void HELPER(log10_FP0)(CPUState *env)
/* log10(x) = log2(x) / log2(10) */
- DBG_FPUH("log10_FP0 %Lg", LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPUH("log10_FP0 %Lg", floatx80_to_ldouble(FP0_to_floatx80(env)));
f = floatx80_to_float64(FP0_to_floatx80(env), &env->fp_status);
log2 = float64_log2(f, &env->fp_status);
@@ -1360,7 +1389,7 @@ void HELPER(log10_FP0)(CPUState *env)
res = floatx80_div(float64_to_floatx80(log2, &env->fp_status),
float64_to_floatx80(log210, &env->fp_status),
&env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1371,12 +1400,12 @@ void HELPER(atan_FP0)(CPUState *env)
long double val;
res = FP0_to_floatx80(env);
- val = LDOUBLE(res);
+ val = floatx80_to_ldouble(res);
DBG_FPUH("atan_FP0 %Lg", val);
val = atanl(val);
DBG_FPU(" = %Lg", val);
- res = FLOATx80(val);
+ res = ldouble_to_floatx80(val);
floatx80_to_FP0(env, res);
}
@@ -1386,12 +1415,12 @@ void HELPER(sin_FP0)(CPUState *env)
long double val;
res = FP0_to_floatx80(env);
- val = LDOUBLE(res);
+ val = floatx80_to_ldouble(res);
DBG_FPUH("sin_FP0 %Lg", val);
val = sinl(val);
DBG_FPU(" = %Lg", val);
- res = FLOATx80(val);
+ res = ldouble_to_floatx80(val);
floatx80_to_FP0(env, res);
}
@@ -1401,12 +1430,12 @@ void HELPER(tan_FP0)(CPUState *env)
long double val;
res = FP0_to_floatx80(env);
- val = LDOUBLE(res);
+ val = floatx80_to_ldouble(res);
DBG_FPUH("tan_FP0 %Lg", val);
val = tanl(val);
DBG_FPU(" = %Lg", val);
- res = FLOATx80(val);
+ res = ldouble_to_floatx80(val);
floatx80_to_FP0(env, res);
}
@@ -1419,7 +1448,7 @@ void HELPER(exp_FP0)(CPUState *env)
f = FP0_to_floatx80(env);
- DBG_FPUH("exp_FP0 %Lg", LDOUBLE(f));
+ DBG_FPUH("exp_FP0 %Lg", floatx80_to_ldouble(f));
f = floatx80_mul(f, floatx80_log2e, &env->fp_status);
res = float32_exp2(floatx80_to_float32(f, &env->fp_status),
@@ -1435,7 +1464,7 @@ void HELPER(exp2_FP0)(CPUState *env)
floatx80 f;
f = FP0_to_floatx80(env);
- DBG_FPUH("exp2_FP0 %Lg", LDOUBLE(f));
+ DBG_FPUH("exp2_FP0 %Lg", floatx80_to_ldouble(f));
res = float32_exp2(floatx80_to_float32(f, &env->fp_status),
&env->fp_status);
@@ -1450,12 +1479,12 @@ void HELPER(exp10_FP0)(CPUState *env)
long double val;
res = FP0_to_floatx80(env);
- val = LDOUBLE(res);
+ val = floatx80_to_ldouble(res);
DBG_FPUH("exp2_FP0 %Lg", val);
val = exp10l(val);
DBG_FPU(" = %Lg", val);
- res = FLOATx80(val);
+ res = ldouble_to_floatx80(val);
floatx80_to_FP0(env, res);
}
@@ -1464,9 +1493,9 @@ void HELPER(abs_FP0)(CPUState *env)
floatx80 res;
res = FP0_to_floatx80(env);
- DBG_FPUH("abs_FP0 %Lg", LDOUBLE(res));
+ DBG_FPUH("abs_FP0 %Lg", floatx80_to_ldouble(res));
res = floatx80_abs(res);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1476,9 +1505,9 @@ void HELPER(chs_FP0)(CPUState *env)
floatx80 res;
res = FP0_to_floatx80(env);
- DBG_FPUH("chs_FP0 %Lg", LDOUBLE(res));
+ DBG_FPUH("chs_FP0 %Lg", floatx80_to_ldouble(res));
res = floatx80_chs(res);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1489,12 +1518,12 @@ void HELPER(acos_FP0)(CPUState *env)
long double val;
res = FP0_to_floatx80(env);
- val = LDOUBLE(res);
+ val = floatx80_to_ldouble(res);
DBG_FPUH("acos_FP0 %Lg", val);
val = acosl(val);
DBG_FPU(" = %Lg", val);
- res = FLOATx80(val);
+ res = ldouble_to_floatx80(val);
floatx80_to_FP0(env, res);
}
@@ -1504,12 +1533,12 @@ void HELPER(cos_FP0)(CPUState *env)
long double val;
res = FP0_to_floatx80(env);
- val = LDOUBLE(res);
+ val = floatx80_to_ldouble(res);
DBG_FPUH("cos_FP0 %Lg", val);
val = cosl(val);
DBG_FPU(" = %Lg", val);
- res = FLOATx80(val);
+ res = ldouble_to_floatx80(val);
floatx80_to_FP0(env, res);
}
@@ -1518,7 +1547,7 @@ void HELPER(getexp_FP0)(CPUState *env)
int32_t exp;
floatx80 res;
- DBG_FPUH("getexp_FP0 %Lg", LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPUH("getexp_FP0 %Lg", floatx80_to_ldouble(FP0_to_floatx80(env)));
DBG_FPU(" fp0h 0x%08x fp0l 0x%016" PRIx64, env->fp0h, env->fp0l);
@@ -1526,7 +1555,7 @@ void HELPER(getexp_FP0)(CPUState *env)
res = int32_to_floatx80(exp, &env->fp_status);
- DBG_FPU(" = %Lg", LDOUBLE(res));
+ DBG_FPU(" = %Lg", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1535,7 +1564,7 @@ void HELPER(scale_FP0_FP1)(CPUState *env)
int32_t scale;
int32_t exp;
- DBG_FPUH("scale_FP0 %Lg", LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPUH("scale_FP0 %Lg", floatx80_to_ldouble(FP0_to_floatx80(env)));
DBG_FPU(" fp0h 0x%08x fp0l 0x%016" PRIx64, env->fp0h, env->fp0l);
@@ -1545,18 +1574,18 @@ void HELPER(scale_FP0_FP1)(CPUState *env)
env->fp0h = (env->fp1h & 0x8000) | (exp & 0x7fff);
env->fp0l = env->fp1l;
- DBG_FPU(" = %Lg", LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPU(" = %Lg", floatx80_to_ldouble(FP0_to_floatx80(env)));
}
void HELPER(add_FP0_FP1)(CPUState *env)
{
floatx80 res;
- DBG_FPUH("add_FP0_FP1 %Lg %Lg", LDOUBLE(FP0_to_floatx80(env)),
- LDOUBLE(FP1_to_floatx80(env)));
+ DBG_FPUH("add_FP0_FP1 %Lg %Lg", floatx80_to_ldouble(FP0_to_floatx80(env)),
+ floatx80_to_ldouble(FP1_to_floatx80(env)));
res = floatx80_add(FP0_to_floatx80(env), FP1_to_floatx80(env),
&env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1565,11 +1594,11 @@ void HELPER(sub_FP0_FP1)(CPUState *env)
{
floatx80 res;
- DBG_FPUH("sub_FP0 %Lg %Lg", LDOUBLE(FP0_to_floatx80(env)),
- LDOUBLE(FP1_to_floatx80(env)));
+ DBG_FPUH("sub_FP0 %Lg %Lg", floatx80_to_ldouble(FP0_to_floatx80(env)),
+ floatx80_to_ldouble(FP1_to_floatx80(env)));
res = floatx80_sub(FP1_to_floatx80(env), FP0_to_floatx80(env),
&env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1579,10 +1608,10 @@ void HELPER(mul_FP0_FP1)(CPUState *env)
floatx80 res;
DBG_FPUH("mul_FP0_FP1 %Lg %Lg",
- LDOUBLE(FP0_to_floatx80(env)), LDOUBLE(FP1_to_floatx80(env)));
+ floatx80_to_ldouble(FP0_to_floatx80(env)), floatx80_to_ldouble(FP1_to_floatx80(env)));
res = floatx80_mul(FP0_to_floatx80(env), FP1_to_floatx80(env),
&env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1592,10 +1621,10 @@ void HELPER(div_FP0_FP1)(CPUState *env)
floatx80 res;
DBG_FPUH("div_FP0_FP1 %Lg %Lg",
- LDOUBLE(FP0_to_floatx80(env)), LDOUBLE(FP1_to_floatx80(env)));
+ floatx80_to_ldouble(FP0_to_floatx80(env)), floatx80_to_ldouble(FP1_to_floatx80(env)));
res = floatx80_div(FP1_to_floatx80(env), FP0_to_floatx80(env),
&env->fp_status);
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1605,14 +1634,14 @@ void HELPER(mod_FP0_FP1)(CPUState *env)
floatx80 res;
long double src, dst;
- src = LDOUBLE(FP0_to_floatx80(env));
- dst = LDOUBLE(FP1_to_floatx80(env));
+ src = floatx80_to_ldouble(FP0_to_floatx80(env));
+ dst = floatx80_to_ldouble(FP1_to_floatx80(env));
DBG_FPUH("mod_FP0_FP1 %Lg %Lg", src, dst);
dst = fmodl(dst, src);
DBG_FPU(" = %Lg\n", dst);
- res = FLOATx80(dst);
+ res = ldouble_to_floatx80(dst);
floatx80_to_FP0(env, res);
}
@@ -1621,8 +1650,8 @@ void HELPER(fcmp_FP0_FP1)(CPUState *env)
/* ??? This may incorrectly raise exceptions. */
/* ??? Should flush denormals to zero. */
floatx80 res;
- DBG_FPUH("cmp_FP0_FP1 %Lg %Lg", LDOUBLE(FP0_to_floatx80(env)),
- LDOUBLE(FP1_to_floatx80(env)));
+ DBG_FPUH("cmp_FP0_FP1 %Lg %Lg", floatx80_to_ldouble(FP0_to_floatx80(env)),
+ floatx80_to_ldouble(FP1_to_floatx80(env)));
res = floatx80_sub(FP1_to_floatx80(env), FP0_to_floatx80(env),
&env->fp_status);
if (floatx80_is_any_nan(res)) {
@@ -1634,7 +1663,7 @@ void HELPER(fcmp_FP0_FP1)(CPUState *env)
res = floatx80_chs(res);
}
}
- DBG_FPU(" = %Lg\n", LDOUBLE(res));
+ DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
floatx80_to_FP0(env, res);
}
@@ -1642,7 +1671,7 @@ uint32_t HELPER(compare_FP0)(CPUState *env)
{
uint32_t res;
- DBG_FPUH("compare_FP0 %Lg", LDOUBLE(FP0_to_floatx80(env)));
+ DBG_FPUH("compare_FP0 %Lg", floatx80_to_ldouble(FP0_to_floatx80(env)));
res = float64_compare_quiet(floatx80_to_float64(FP0_to_floatx80(env),
&env->fp_status),
float64_zero, &env->fp_status);
--
1.7.2.3
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Qemu-devel] [PATCH 097/111] m68k: use expl() to compute exp_FP0()
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
` (5 preceding siblings ...)
2011-08-17 20:53 ` [Qemu-devel] [PATCH 096/111] m68k: correctly convert floatx80<->long double Bryce Lanham
@ 2011-08-17 20:53 ` Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 098/111] m68k: use exp2l() to compute exp2_FP0() Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 099/111] m68k: use logl() to compute ln_FP0() Bryce Lanham
8 siblings, 0 replies; 10+ messages in thread
From: Bryce Lanham @ 2011-08-17 20:53 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
From: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/helper.c | 12 ++++--------
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 17f2d48..d4364f7 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -1442,20 +1442,16 @@ void HELPER(tan_FP0)(CPUState *env)
void HELPER(exp_FP0)(CPUState *env)
{
floatx80 f;
- float32 res;
-
- /* exp(x) = exp2(x * log2(e)) */
+ long double res;
f = FP0_to_floatx80(env);
DBG_FPUH("exp_FP0 %Lg", floatx80_to_ldouble(f));
- f = floatx80_mul(f, floatx80_log2e, &env->fp_status);
- res = float32_exp2(floatx80_to_float32(f, &env->fp_status),
- &env->fp_status);
+ res = expl(floatx80_to_ldouble(f));
- DBG_FPU(" = %f\n", FLOAT(res));
- floatx80_to_FP0(env, float32_to_floatx80(res, &env->fp_status));
+ DBG_FPU(" = %Lg\n", res);
+ floatx80_to_FP0(env, ldouble_to_floatx80(res));
}
void HELPER(exp2_FP0)(CPUState *env)
--
1.7.2.3
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Qemu-devel] [PATCH 098/111] m68k: use exp2l() to compute exp2_FP0()
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
` (6 preceding siblings ...)
2011-08-17 20:53 ` [Qemu-devel] [PATCH 097/111] m68k: use expl() to compute exp_FP0() Bryce Lanham
@ 2011-08-17 20:53 ` Bryce Lanham
2011-08-17 20:53 ` [Qemu-devel] [PATCH 099/111] m68k: use logl() to compute ln_FP0() Bryce Lanham
8 siblings, 0 replies; 10+ messages in thread
From: Bryce Lanham @ 2011-08-17 20:53 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
From: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/helper.c | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index d4364f7..979c8e5 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -1456,17 +1456,17 @@ void HELPER(exp_FP0)(CPUState *env)
void HELPER(exp2_FP0)(CPUState *env)
{
- float32 res;
floatx80 f;
+ long double res;
f = FP0_to_floatx80(env);
+
DBG_FPUH("exp2_FP0 %Lg", floatx80_to_ldouble(f));
- res = float32_exp2(floatx80_to_float32(f, &env->fp_status),
- &env->fp_status);
- DBG_FPU(" = %f\n", FLOAT(res));
+ res = exp2l(floatx80_to_ldouble(f));
- floatx80_to_FP0(env, float32_to_floatx80(res, &env->fp_status));
+ DBG_FPU(" = %Lg\n", res);
+ floatx80_to_FP0(env, ldouble_to_floatx80(res));
}
void HELPER(exp10_FP0)(CPUState *env)
--
1.7.2.3
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Qemu-devel] [PATCH 099/111] m68k: use logl() to compute ln_FP0()
2011-08-17 20:53 [Qemu-devel] [PATCH 090/111] m68k: correctly define and manage NaN Bryce Lanham
` (7 preceding siblings ...)
2011-08-17 20:53 ` [Qemu-devel] [PATCH 098/111] m68k: use exp2l() to compute exp2_FP0() Bryce Lanham
@ 2011-08-17 20:53 ` Bryce Lanham
8 siblings, 0 replies; 10+ messages in thread
From: Bryce Lanham @ 2011-08-17 20:53 UTC (permalink / raw)
To: qemu-devel; +Cc: Laurent Vivier
From: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/helper.c | 21 +++++++--------------
1 files changed, 7 insertions(+), 14 deletions(-)
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 979c8e5..f67a2d8 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -1355,22 +1355,15 @@ void HELPER(sqrt_FP0)(CPUState *env)
void HELPER(ln_FP0)(CPUState *env)
{
- float64 f, log2;
- floatx80 res;
-
- /* ln(x) = log2(x) / log2(e) */
-
- res = FP0_to_floatx80(env);
- DBG_FPUH("ln_FP0 %Lg", floatx80_to_ldouble(res));
-
- f = floatx80_to_float64(res, &env->fp_status);
+ floatx80 val;
+ long double res;
- log2 = float64_log2(f, &env->fp_status);
- res = floatx80_div(float64_to_floatx80(log2, &env->fp_status),
- floatx80_log2e, &env->fp_status);
- DBG_FPU(" = %Lg\n", floatx80_to_ldouble(res));
+ val = FP0_to_floatx80(env);
+ DBG_FPUH("ln_FP0 %Lg", floatx80_to_ldouble(val));
+ res = logl(floatx80_to_ldouble(val));
+ DBG_FPU(" = %Lg\n", res);
- floatx80_to_FP0(env, res);
+ floatx80_to_FP0(env, ldouble_to_floatx80(res));
}
void HELPER(log10_FP0)(CPUState *env)
--
1.7.2.3
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