From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:49154) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qumyl-00071Y-5t for qemu-devel@nongnu.org; Sat, 20 Aug 2011 10:56:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qumyf-0007g1-1g for qemu-devel@nongnu.org; Sat, 20 Aug 2011 10:56:50 -0400 Received: from smtp5-g21.free.fr ([212.27.42.5]:49495) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qumye-0007fm-Ad for qemu-devel@nongnu.org; Sat, 20 Aug 2011 10:56:48 -0400 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Sat, 20 Aug 2011 16:56:34 +0200 Message-Id: <1313852195-23081-6-git-send-email-hpoussin@reactos.org> In-Reply-To: <1313852195-23081-1-git-send-email-hpoussin@reactos.org> References: <1313852195-23081-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [RFC 5/6] isa: improve bus implementation of PIIX3 bridge List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Signed-off-by: Herv=C3=A9 Poussineau --- hw/pc_piix.c | 2 +- hw/piix_pci.c | 23 ++++++++++++++++++++++- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/hw/pc_piix.c b/hw/pc_piix.c index d8f285c..af45a13 100644 --- a/hw/pc_piix.c +++ b/hw/pc_piix.c @@ -135,8 +135,8 @@ static void pc_init1(MemoryRegion *system_memory, pci_bus =3D NULL; i440fx_state =3D NULL; isa_bus_bridge_init(NULL); + isa_bus_irqs(i8259); } - isa_bus_irqs(isa_irq); =20 pc_register_ferr_irq(isa_get_irq(13)); =20 diff --git a/hw/piix_pci.c b/hw/piix_pci.c index 0b56553..4be1dcd 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -30,6 +30,7 @@ #include "sysbus.h" #include "range.h" #include "xen.h" +#include "exec-memory.h" =20 /* * I440FX chipset data sheet. @@ -45,6 +46,7 @@ typedef PCIHostState I440FXState; =20 typedef struct PIIX3State { PCIDevice dev; + ISABus bus; =20 /* * bitmap to track pic levels. @@ -443,11 +445,30 @@ static const VMStateDescription vmstate_piix3 =3D { } }; =20 +static qemu_irq piix3_bus_get_irq(ISABus *bus, int isairq) +{ + PIIX3State *d =3D container_of(bus, PIIX3State, bus); + if (isairq < 0 || isairq >=3D PIIX_NUM_PIC_IRQS) { + hw_error("isa irq %d invalid", isairq); + } + return d->pic[isairq]; +} + +static MemoryRegion *piix3_bus_get_address_space(ISABus *bus) +{ + return get_system_memory(); +} + +static ISABusOps piix3_bus_ops =3D { + .get_irq =3D piix3_bus_get_irq, + .get_address_space =3D piix3_bus_get_address_space, +}; + static int piix3_initfn(PCIDevice *dev) { PIIX3State *d =3D DO_UPCAST(PIIX3State, dev, dev); =20 - isa_bus_bridge_init(&d->dev.qdev); + isa_bus_new(&d->bus, &piix3_bus_ops, &dev->qdev); qemu_register_reset(piix3_reset, d); return 0; } --=20 1.7.5.4