From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:42890) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qvj1f-0000Sp-7G for qemu-devel@nongnu.org; Tue, 23 Aug 2011 00:55:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qvj1e-0003oL-4U for qemu-devel@nongnu.org; Tue, 23 Aug 2011 00:55:47 -0400 Received: from cantor2.suse.de ([195.135.220.15]:44823 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qvj1d-0003o3-SR for qemu-devel@nongnu.org; Tue, 23 Aug 2011 00:55:46 -0400 From: Alexander Graf Date: Tue, 23 Aug 2011 06:55:41 +0200 Message-Id: <1314075344-20839-1-git-send-email-agraf@suse.de> Subject: [Qemu-devel] [PATCH 0/3] PPC: E500: Support SPE guest List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: scottwood@freescale.com When I bumped into Jason on Linuxcon, we tried out to run the e500 target on his Windriver build that used SPE and immediately ran into emulation issues. Fortunately there weren't too many, so here are the patches to get a guest using SPE instructions working just fine. Thanks a lot for the debugging session Jason! It really helps when 2 pairs of eyes look at code :) Alex Alexander Graf (3): PPC: E500: Add ESR bit definitions PPC: E500: Inject SPE exception on invalid SPE access PPC: E500: Set ESR values target-ppc/cpu.h | 17 ++++++++++- target-ppc/helper.c | 10 +++++- target-ppc/translate.c | 78 ++++++++++++++++++++++++------------------------ 3 files changed, 63 insertions(+), 42 deletions(-)