From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:37338) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QwgVf-000831-Gf for qemu-devel@nongnu.org; Thu, 25 Aug 2011 16:26:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QwgVd-0008OD-Mt for qemu-devel@nongnu.org; Thu, 25 Aug 2011 16:26:42 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:47146) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QwgVd-0008O3-F6 for qemu-devel@nongnu.org; Thu, 25 Aug 2011 16:26:41 -0400 From: Peter Maydell Date: Thu, 25 Aug 2011 21:05:02 +0100 Message-Id: <1314302711-20498-9-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1314302711-20498-1-git-send-email-peter.maydell@linaro.org> References: <1314302711-20498-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 08/17] omap_gpmc: Fix handling of FIFOTHRESHOLDSTATUS bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: patches@linaro.org The OMAP3 TRM is inconsistent about whether the GPMC FIFOTHRESHOLDSTATUS bit should be set when FIFOPOINTER > FIFOTHRESHOLD or when it is >= FIFOTHRESHOLD. Apparently the underlying functional spec from which the TRM was created states that the behaviour is ">=", and this also makes more conceptual sense. Signed-off-by: Peter Maydell --- hw/omap_gpmc.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/omap_gpmc.c b/hw/omap_gpmc.c index b728397..9da8491 100644 --- a/hw/omap_gpmc.c +++ b/hw/omap_gpmc.c @@ -222,7 +222,7 @@ static uint64_t omap_gpmc_read(void *opaque, target_phys_addr_t addr, return s->prefcontrol; case 0x1f0: /* GPMC_PREFETCH_STATUS */ return (s->preffifo << 24) | - ((s->preffifo > + ((s->preffifo >= ((s->prefconfig[0] >> 8) & 0x7f) ? 1 : 0) << 16) | s->prefcount; -- 1.7.1