[Qemu-devel] [PATCH 1/2] mipsnet: convert to qdev

[Qemu-devel] [PATCH 1/2] mipsnet: convert to qdev

[Hervé Poussineau]

Move mipsnet_init() function to mipssim machine

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
 hw/mips.h         |    3 --
 hw/mips_mipssim.c |   18 ++++++++++++
 hw/mipsnet.c      |   80 +++++++++++++++++++++++++++++++----------------------
 3 files changed, 65 insertions(+), 36 deletions(-)

diff --git a/hw/mips.h b/hw/mips.h
index 472cfb0..4d4d503 100644
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -8,9 +8,6 @@ PCIBus *gt64120_register(qemu_irq *pic);
 /* bonito.c */
 PCIBus *bonito_init(qemu_irq *pic);
 
-/* mipsnet.c */
-void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
-
 /* rc4030.c */
 typedef struct rc4030DMAState *rc4030_dma;
 void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c
index 0d46cc4..ac65555 100644
--- a/hw/mips_mipssim.c
+++ b/hw/mips_mipssim.c
@@ -35,6 +35,8 @@
 #include "mips-bios.h"
 #include "loader.h"
 #include "elf.h"
+#include "sysbus.h"
+#include "exec-memory.h"
 
 static struct _loaderparams {
     int ram_size;
@@ -112,6 +114,22 @@ static void main_cpu_reset(void *opaque)
     }
 }
 
+static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
+{
+    DeviceState *dev;
+    SysBusDevice *s;
+
+    dev = qdev_create(NULL, "mipsnet");
+    qdev_set_nic_properties(dev, nd);
+    qdev_init_nofail(dev);
+
+    s = sysbus_from_qdev(dev);
+    sysbus_connect_irq(s, 0, irq);
+    memory_region_add_subregion(get_system_io(),
+                                base,
+                                sysbus_mmio_get_region(s, 0));
+}
+
 static void
 mips_mipssim_init (ram_addr_t ram_size,
                    const char *boot_device,
diff --git a/hw/mipsnet.c b/hw/mipsnet.c
index b889ee0..9a29ffe 100644
--- a/hw/mipsnet.c
+++ b/hw/mipsnet.c
@@ -1,7 +1,6 @@
 #include "hw.h"
-#include "mips.h"
 #include "net.h"
-#include "isa.h"
+#include "sysbus.h"
 
 //#define DEBUG_MIPSNET_SEND
 //#define DEBUG_MIPSNET_RECEIVE
@@ -25,6 +24,8 @@
 #define MAX_ETH_FRAME_SIZE	1514
 
 typedef struct MIPSnetState {
+    SysBusDevice busdev;
+
     uint32_t busy;
     uint32_t rx_count;
     uint32_t rx_read;
@@ -33,7 +34,7 @@ typedef struct MIPSnetState {
     uint32_t intctl;
     uint8_t rx_buffer[MAX_ETH_FRAME_SIZE];
     uint8_t tx_buffer[MAX_ETH_FRAME_SIZE];
-    int io_base;
+    MemoryRegion io;
     qemu_irq irq;
     NICState *nic;
     NICConf conf;
@@ -103,7 +104,8 @@ static ssize_t mipsnet_receive(VLANClientState *nc, const uint8_t *buf, size_t s
     return size;
 }
 
-static uint32_t mipsnet_ioport_read(void *opaque, uint32_t addr)
+static uint64_t mipsnet_ioport_read(void *opaque, target_phys_addr_t addr,
+                                    unsigned int size)
 {
     MIPSnetState *s = opaque;
     int ret = 0;
@@ -150,7 +152,8 @@ static uint32_t mipsnet_ioport_read(void *opaque, uint32_t addr)
     return ret;
 }
 
-static void mipsnet_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+static void mipsnet_ioport_write(void *opaque, target_phys_addr_t addr,
+                                 uint64_t val, unsigned int size)
 {
     MIPSnetState *s = opaque;
 
@@ -224,11 +227,7 @@ static void mipsnet_cleanup(VLANClientState *nc)
 {
     MIPSnetState *s = DO_UPCAST(NICState, nc, nc)->opaque;
 
-    vmstate_unregister(NULL, &vmstate_mipsnet, s);
-
-    isa_unassign_ioport(s->io_base, 36);
-
-    g_free(s);
+    s->nic = NULL;
 }
 
 static NetClientInfo net_mipsnet_info = {
@@ -239,35 +238,50 @@ static NetClientInfo net_mipsnet_info = {
     .cleanup = mipsnet_cleanup,
 };
 
-void mipsnet_init (int base, qemu_irq irq, NICInfo *nd)
-{
-    MIPSnetState *s;
-
-    qemu_check_nic_model(nd, "mipsnet");
+static MemoryRegionOps mipsnet_ioport_ops = {
+    .read = mipsnet_ioport_read,
+    .write = mipsnet_ioport_write,
+    .impl.min_access_size = 1,
+    .impl.max_access_size = 4,
+};
 
-    s = g_malloc0(sizeof(MIPSnetState));
+static int mipsnet_sysbus_init(SysBusDevice *dev)
+{
+    MIPSnetState *s = DO_UPCAST(MIPSnetState, busdev, dev);
 
-    register_ioport_write(base, 36, 1, mipsnet_ioport_write, s);
-    register_ioport_read(base, 36, 1, mipsnet_ioport_read, s);
-    register_ioport_write(base, 36, 2, mipsnet_ioport_write, s);
-    register_ioport_read(base, 36, 2, mipsnet_ioport_read, s);
-    register_ioport_write(base, 36, 4, mipsnet_ioport_write, s);
-    register_ioport_read(base, 36, 4, mipsnet_ioport_read, s);
+    memory_region_init_io(&s->io, &mipsnet_ioport_ops, s, "mipsnet-io", 36);
+    sysbus_init_mmio_region(dev, &s->io);
+    sysbus_init_irq(dev, &s->irq);
 
-    s->io_base = base;
-    s->irq = irq;
+    s->nic = qemu_new_nic(&net_mipsnet_info, &s->conf,
+                          dev->qdev.info->name, dev->qdev.id, s);
+    qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
 
-    if (nd) {
-        s->conf.macaddr = nd->macaddr;
-        s->conf.vlan = nd->vlan;
-        s->conf.peer = nd->netdev;
+    return 0;
+}
 
-        s->nic = qemu_new_nic(&net_mipsnet_info, &s->conf,
-                              nd->model, nd->name, s);
+static void mipsnet_sysbus_reset(DeviceState *dev)
+{
+    MIPSnetState *s = DO_UPCAST(MIPSnetState, busdev.qdev, dev);
+    mipsnet_reset(s);
+}
 
-        qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
+static SysBusDeviceInfo mipsnet_info = {
+    .init = mipsnet_sysbus_init,
+    .qdev.name = "mipsnet",
+    .qdev.desc = "MIPS Simulator network device",
+    .qdev.size = sizeof(MIPSnetState),
+    .qdev.vmsd = &vmstate_mipsnet,
+    .qdev.reset = mipsnet_sysbus_reset,
+    .qdev.props = (Property[]) {
+        DEFINE_NIC_PROPERTIES(MIPSnetState, conf),
+        DEFINE_PROP_END_OF_LIST(),
     }
+};
 
-    mipsnet_reset(s);
-    vmstate_register(NULL, 0, &vmstate_mipsnet, s);
+static void mipsnet_register_devices(void)
+{
+    sysbus_register_withprop(&mipsnet_info);
 }
+
+device_init(mipsnet_register_devices)
-- 
1.7.5.4

[Qemu-devel] [PATCH 2/2] mipsnet: use trace framework

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
 hw/mipsnet.c |   26 ++++++--------------------
 trace-events |    7 +++++++
 2 files changed, 13 insertions(+), 20 deletions(-)

diff --git a/hw/mipsnet.c b/hw/mipsnet.c
index 9a29ffe..605367b 100644
--- a/hw/mipsnet.c
+++ b/hw/mipsnet.c
@@ -1,12 +1,8 @@
 #include "hw.h"
 #include "net.h"
+#include "trace.h"
 #include "sysbus.h"
 
-//#define DEBUG_MIPSNET_SEND
-//#define DEBUG_MIPSNET_RECEIVE
-//#define DEBUG_MIPSNET_DATA
-//#define DEBUG_MIPSNET_IRQ
-
 /* MIPSnet register offsets */
 
 #define MIPSNET_DEV_ID		0x00
@@ -55,9 +51,7 @@ static void mipsnet_reset(MIPSnetState *s)
 static void mipsnet_update_irq(MIPSnetState *s)
 {
     int isr = !!s->intctl;
-#ifdef DEBUG_MIPSNET_IRQ
-    printf("mipsnet: Set IRQ to %d (%02x)\n", isr, s->intctl);
-#endif
+    trace_mipsnet_irq(isr, s->intctl);
     qemu_set_irq(s->irq, isr);
 }
 
@@ -81,9 +75,7 @@ static ssize_t mipsnet_receive(VLANClientState *nc, const uint8_t *buf, size_t s
 {
     MIPSnetState *s = DO_UPCAST(NICState, nc, nc)->opaque;
 
-#ifdef DEBUG_MIPSNET_RECEIVE
-    printf("mipsnet: receiving len=%zu\n", size);
-#endif
+    trace_mipsnet_receive(size);
     if (!mipsnet_can_receive(nc))
         return -1;
 
@@ -146,9 +138,7 @@ static uint64_t mipsnet_ioport_read(void *opaque, target_phys_addr_t addr,
     default:
         break;
     }
-#ifdef DEBUG_MIPSNET_DATA
-    printf("mipsnet: read addr=0x%02x val=0x%02x\n", addr, ret);
-#endif
+    trace_mipsnet_read(addr, ret);
     return ret;
 }
 
@@ -158,9 +148,7 @@ static void mipsnet_ioport_write(void *opaque, target_phys_addr_t addr,
     MIPSnetState *s = opaque;
 
     addr &= 0x3f;
-#ifdef DEBUG_MIPSNET_DATA
-    printf("mipsnet: write addr=0x%02x val=0x%02x\n", addr, val);
-#endif
+    trace_mipsnet_write(addr, val);
     switch (addr) {
     case MIPSNET_TX_DATA_COUNT:
 	s->tx_count = (val <= MAX_ETH_FRAME_SIZE) ? val : 0;
@@ -184,9 +172,7 @@ static void mipsnet_ioport_write(void *opaque, target_phys_addr_t addr,
         s->tx_buffer[s->tx_written++] = val;
         if (s->tx_written == s->tx_count) {
             /* Send buffer. */
-#ifdef DEBUG_MIPSNET_SEND
-            printf("mipsnet: sending len=%d\n", s->tx_count);
-#endif
+            trace_mipsnet_send(s->tx_count);
             qemu_send_packet(&s->nic->nc, s->tx_buffer, s->tx_count);
             s->tx_count = s->tx_written = 0;
             s->intctl |= MIPSNET_INTCTL_TXDONE;
diff --git a/trace-events b/trace-events
index 2fd56f1..a303199 100644
--- a/trace-events
+++ b/trace-events
@@ -422,6 +422,13 @@ milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX"
 milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 
+# hw/mipsnet.c
+mipsnet_send(uint32_t size) "sending len=%u"
+mipsnet_receive(uint32_t size) "receiving len=%u"
+mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
+mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64
+mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
+
 # xen-all.c
 xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
 xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"
-- 
1.7.5.4

Re: [Qemu-devel] [PATCH 1/2] mipsnet: convert to qdev

[Blue Swirl]

Thanks, applied both.

2011/9/4 Hervé Poussineau <hpoussin@reactos.org>:
> Move mipsnet_init() function to mipssim machine
>
> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
> ---
>  hw/mips.h         |    3 --
>  hw/mips_mipssim.c |   18 ++++++++++++
>  hw/mipsnet.c      |   80 +++++++++++++++++++++++++++++++----------------------
>  3 files changed, 65 insertions(+), 36 deletions(-)
>
> diff --git a/hw/mips.h b/hw/mips.h
> index 472cfb0..4d4d503 100644
> --- a/hw/mips.h
> +++ b/hw/mips.h
> @@ -8,9 +8,6 @@ PCIBus *gt64120_register(qemu_irq *pic);
>  /* bonito.c */
>  PCIBus *bonito_init(qemu_irq *pic);
>
> -/* mipsnet.c */
> -void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
> -
>  /* rc4030.c */
>  typedef struct rc4030DMAState *rc4030_dma;
>  void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
> diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c
> index 0d46cc4..ac65555 100644
> --- a/hw/mips_mipssim.c
> +++ b/hw/mips_mipssim.c
> @@ -35,6 +35,8 @@
>  #include "mips-bios.h"
>  #include "loader.h"
>  #include "elf.h"
> +#include "sysbus.h"
> +#include "exec-memory.h"
>
>  static struct _loaderparams {
>     int ram_size;
> @@ -112,6 +114,22 @@ static void main_cpu_reset(void *opaque)
>     }
>  }
>
> +static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
> +{
> +    DeviceState *dev;
> +    SysBusDevice *s;
> +
> +    dev = qdev_create(NULL, "mipsnet");
> +    qdev_set_nic_properties(dev, nd);
> +    qdev_init_nofail(dev);
> +
> +    s = sysbus_from_qdev(dev);
> +    sysbus_connect_irq(s, 0, irq);
> +    memory_region_add_subregion(get_system_io(),
> +                                base,
> +                                sysbus_mmio_get_region(s, 0));
> +}
> +
>  static void
>  mips_mipssim_init (ram_addr_t ram_size,
>                    const char *boot_device,
> diff --git a/hw/mipsnet.c b/hw/mipsnet.c
> index b889ee0..9a29ffe 100644
> --- a/hw/mipsnet.c
> +++ b/hw/mipsnet.c
> @@ -1,7 +1,6 @@
>  #include "hw.h"
> -#include "mips.h"
>  #include "net.h"
> -#include "isa.h"
> +#include "sysbus.h"
>
>  //#define DEBUG_MIPSNET_SEND
>  //#define DEBUG_MIPSNET_RECEIVE
> @@ -25,6 +24,8 @@
>  #define MAX_ETH_FRAME_SIZE     1514
>
>  typedef struct MIPSnetState {
> +    SysBusDevice busdev;
> +
>     uint32_t busy;
>     uint32_t rx_count;
>     uint32_t rx_read;
> @@ -33,7 +34,7 @@ typedef struct MIPSnetState {
>     uint32_t intctl;
>     uint8_t rx_buffer[MAX_ETH_FRAME_SIZE];
>     uint8_t tx_buffer[MAX_ETH_FRAME_SIZE];
> -    int io_base;
> +    MemoryRegion io;
>     qemu_irq irq;
>     NICState *nic;
>     NICConf conf;
> @@ -103,7 +104,8 @@ static ssize_t mipsnet_receive(VLANClientState *nc, const uint8_t *buf, size_t s
>     return size;
>  }
>
> -static uint32_t mipsnet_ioport_read(void *opaque, uint32_t addr)
> +static uint64_t mipsnet_ioport_read(void *opaque, target_phys_addr_t addr,
> +                                    unsigned int size)
>  {
>     MIPSnetState *s = opaque;
>     int ret = 0;
> @@ -150,7 +152,8 @@ static uint32_t mipsnet_ioport_read(void *opaque, uint32_t addr)
>     return ret;
>  }
>
> -static void mipsnet_ioport_write(void *opaque, uint32_t addr, uint32_t val)
> +static void mipsnet_ioport_write(void *opaque, target_phys_addr_t addr,
> +                                 uint64_t val, unsigned int size)
>  {
>     MIPSnetState *s = opaque;
>
> @@ -224,11 +227,7 @@ static void mipsnet_cleanup(VLANClientState *nc)
>  {
>     MIPSnetState *s = DO_UPCAST(NICState, nc, nc)->opaque;
>
> -    vmstate_unregister(NULL, &vmstate_mipsnet, s);
> -
> -    isa_unassign_ioport(s->io_base, 36);
> -
> -    g_free(s);
> +    s->nic = NULL;
>  }
>
>  static NetClientInfo net_mipsnet_info = {
> @@ -239,35 +238,50 @@ static NetClientInfo net_mipsnet_info = {
>     .cleanup = mipsnet_cleanup,
>  };
>
> -void mipsnet_init (int base, qemu_irq irq, NICInfo *nd)
> -{
> -    MIPSnetState *s;
> -
> -    qemu_check_nic_model(nd, "mipsnet");
> +static MemoryRegionOps mipsnet_ioport_ops = {
> +    .read = mipsnet_ioport_read,
> +    .write = mipsnet_ioport_write,
> +    .impl.min_access_size = 1,
> +    .impl.max_access_size = 4,
> +};
>
> -    s = g_malloc0(sizeof(MIPSnetState));
> +static int mipsnet_sysbus_init(SysBusDevice *dev)
> +{
> +    MIPSnetState *s = DO_UPCAST(MIPSnetState, busdev, dev);
>
> -    register_ioport_write(base, 36, 1, mipsnet_ioport_write, s);
> -    register_ioport_read(base, 36, 1, mipsnet_ioport_read, s);
> -    register_ioport_write(base, 36, 2, mipsnet_ioport_write, s);
> -    register_ioport_read(base, 36, 2, mipsnet_ioport_read, s);
> -    register_ioport_write(base, 36, 4, mipsnet_ioport_write, s);
> -    register_ioport_read(base, 36, 4, mipsnet_ioport_read, s);
> +    memory_region_init_io(&s->io, &mipsnet_ioport_ops, s, "mipsnet-io", 36);
> +    sysbus_init_mmio_region(dev, &s->io);
> +    sysbus_init_irq(dev, &s->irq);
>
> -    s->io_base = base;
> -    s->irq = irq;
> +    s->nic = qemu_new_nic(&net_mipsnet_info, &s->conf,
> +                          dev->qdev.info->name, dev->qdev.id, s);
> +    qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
>
> -    if (nd) {
> -        s->conf.macaddr = nd->macaddr;
> -        s->conf.vlan = nd->vlan;
> -        s->conf.peer = nd->netdev;
> +    return 0;
> +}
>
> -        s->nic = qemu_new_nic(&net_mipsnet_info, &s->conf,
> -                              nd->model, nd->name, s);
> +static void mipsnet_sysbus_reset(DeviceState *dev)
> +{
> +    MIPSnetState *s = DO_UPCAST(MIPSnetState, busdev.qdev, dev);
> +    mipsnet_reset(s);
> +}
>
> -        qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
> +static SysBusDeviceInfo mipsnet_info = {
> +    .init = mipsnet_sysbus_init,
> +    .qdev.name = "mipsnet",
> +    .qdev.desc = "MIPS Simulator network device",
> +    .qdev.size = sizeof(MIPSnetState),
> +    .qdev.vmsd = &vmstate_mipsnet,
> +    .qdev.reset = mipsnet_sysbus_reset,
> +    .qdev.props = (Property[]) {
> +        DEFINE_NIC_PROPERTIES(MIPSnetState, conf),
> +        DEFINE_PROP_END_OF_LIST(),
>     }
> +};
>
> -    mipsnet_reset(s);
> -    vmstate_register(NULL, 0, &vmstate_mipsnet, s);
> +static void mipsnet_register_devices(void)
> +{
> +    sysbus_register_withprop(&mipsnet_info);
>  }
> +
> +device_init(mipsnet_register_devices)
> --
> 1.7.5.4
>
>
>

Re: [Qemu-devel] [PATCH 2/2] mipsnet: use trace framework

[Paolo Bonzini]

On 09/04/2011 10:29 PM, Hervé Poussineau wrote:
> +mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64

This breaks the build, though actually it is because of a bug in the parser.  It
should be written as

mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 ""

Paolo