From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:60838) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0V9N-0002ar-9T for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:07:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R0V9J-00009r-EZ for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:07:29 -0400 Received: from v220110690675601.yourvserver.net ([78.47.199.172]:47974) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0V9I-00009c-RH for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:07:25 -0400 From: Stefan Weil Date: Mon, 5 Sep 2011 11:06:58 +0200 Message-Id: <1315213622-7051-2-git-send-email-weil@mail.berlios.de> In-Reply-To: <1315213622-7051-1-git-send-email-weil@mail.berlios.de> References: <1315213622-7051-1-git-send-email-weil@mail.berlios.de> Subject: [Qemu-devel] [PATCH 1/5] tcg/i386: Only one call output register needed for 64 bit hosts List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: QEMU Developers The second register is only needed for 32 bit hosts. Signed-off-by: Stefan Weil --- tcg/i386/tcg-target.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 7529677..281f87d 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -76,9 +76,11 @@ static const int tcg_target_call_iarg_regs[] = { #endif }; -static const int tcg_target_call_oarg_regs[2] = { +static const int tcg_target_call_oarg_regs[] = { TCG_REG_EAX, +#if TCG_TARGET_REG_BITS == 32 TCG_REG_EDX +#endif }; static uint8_t *tb_ret_addr; -- 1.7.0.4