From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:60751) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0V9D-00025Y-L0 for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:07:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R0V99-00007v-S1 for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:07:19 -0400 Received: from v220110690675601.yourvserver.net ([78.47.199.172]:47436) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0V99-00007m-NK for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:07:15 -0400 From: Stefan Weil Date: Mon, 5 Sep 2011 11:07:01 +0200 Message-Id: <1315213622-7051-5-git-send-email-weil@mail.berlios.de> In-Reply-To: <1315213622-7051-1-git-send-email-weil@mail.berlios.de> References: <1315213622-7051-1-git-send-email-weil@mail.berlios.de> Subject: [Qemu-devel] [PATCH 4/5] tcg/sparc: Only one call output register needed for 64 bit hosts List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: QEMU Developers Cc: Blue Swirl The second register is only needed for 32 bit hosts. Cc: Blue Swirl Signed-off-by: Stefan Weil --- tcg/sparc/tcg-target.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index ac76e11..fc3fd7f 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -84,9 +84,11 @@ static const int tcg_target_call_iarg_regs[6] = { TCG_REG_O5, }; -static const int tcg_target_call_oarg_regs[2] = { +static const int tcg_target_call_oarg_regs[] = { TCG_REG_O0, - TCG_REG_O1, +#if TCG_TARGET_REG_BITS == 32 + TCG_REG_O1 +#endif }; static inline int check_fit_tl(tcg_target_long val, unsigned int bits) -- 1.7.0.4