From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:60800) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0V9J-0002Nc-Jo for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:07:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R0V9F-000091-0Z for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:07:25 -0400 Received: from v220110690675601.yourvserver.net ([78.47.199.172]:47731) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0V9E-00008l-KS for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:07:20 -0400 From: Stefan Weil Date: Mon, 5 Sep 2011 11:07:02 +0200 Message-Id: <1315213622-7051-6-git-send-email-weil@mail.berlios.de> In-Reply-To: <1315213622-7051-1-git-send-email-weil@mail.berlios.de> References: <1315213622-7051-1-git-send-email-weil@mail.berlios.de> Subject: [Qemu-devel] [PATCH 5/5] tcg/ppc64: Only one call output register needed for 64 bit hosts List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: QEMU Developers The second register is only needed for 32 bit hosts. Cc: Vassili Karpov Signed-off-by: Stefan Weil --- tcg/ppc64/tcg-target.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index d831684..bef7aac 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -130,7 +130,7 @@ static const int tcg_target_call_iarg_regs[] = { TCG_REG_R10 }; -static const int tcg_target_call_oarg_regs[2] = { +static const int tcg_target_call_oarg_regs[] = { TCG_REG_R3 }; -- 1.7.0.4