From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:36216) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0Yp0-0002gz-Fx for qemu-devel@nongnu.org; Mon, 05 Sep 2011 09:02:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R0Yoz-0006g7-Df for qemu-devel@nongnu.org; Mon, 05 Sep 2011 09:02:42 -0400 Received: from mtagate1.uk.ibm.com ([194.196.100.161]:50512) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0Yoz-0006fs-5w for qemu-devel@nongnu.org; Mon, 05 Sep 2011 09:02:41 -0400 Received: from d06nrmr1806.portsmouth.uk.ibm.com (d06nrmr1806.portsmouth.uk.ibm.com [9.149.39.193]) by mtagate1.uk.ibm.com (8.13.1/8.13.1) with ESMTP id p85D2aXv010965 for ; Mon, 5 Sep 2011 13:02:36 GMT Received: from d06av10.portsmouth.uk.ibm.com (d06av10.portsmouth.uk.ibm.com [9.149.37.251]) by d06nrmr1806.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p85D2a8U2396376 for ; Mon, 5 Sep 2011 14:02:36 +0100 Received: from d06av10.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av10.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p85D2ama001895 for ; Mon, 5 Sep 2011 07:02:36 -0600 From: Stefan Hajnoczi Date: Mon, 5 Sep 2011 14:02:29 +0100 Message-Id: <1315227749-26187-1-git-send-email-stefanha@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH] ppc405: use RAM_ADDR_FMT instead of %08lx List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexander Graf , Sheldon , Stefan Hajnoczi The RAM_ADDR_FMT macro hides the type of ram_addr_t so that format strings can be safely used. Make sure to use RAM_ADDR_FMT so that the build works on 32-bit hosts with Xen enabled. Whether Xen should affect ppc TCG targets is questionable but a separate issue. Signed-off-by: Stefan Hajnoczi --- hw/ppc405_boards.c | 11 ++++++----- 1 files changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c index dec165e4..5da26dc 100644 --- a/hw/ppc405_boards.c +++ b/hw/ppc405_boards.c @@ -211,7 +211,8 @@ static void ref405ep_init (ram_addr_t ram_size, sram_size = 512 * 1024; sram_offset = qemu_ram_alloc(NULL, "ef405ep.sram", sram_size); #ifdef DEBUG_BOARD_INIT - printf("%s: register SRAM at offset %08lx\n", __func__, sram_offset); + printf("%s: register SRAM at offset " RAM_ADDR_FMT "\n", + __func__, sram_offset); #endif cpu_register_physical_memory(0xFFF00000, sram_size, sram_offset | IO_MEM_RAM); @@ -228,7 +229,7 @@ static void ref405ep_init (ram_addr_t ram_size, fl_sectors = (bios_size + 65535) >> 16; #ifdef DEBUG_BOARD_INIT printf("Register parallel flash %d size %lx" - " at offset %08lx addr %lx '%s' %d\n", + " at offset " RAM_ADDR_FMT " addr %lx '%s' %d\n", fl_idx, bios_size, bios_offset, -bios_size, bdrv_get_device_name(dinfo->bdrv), fl_sectors); #endif @@ -353,7 +354,7 @@ static void ref405ep_init (ram_addr_t ram_size, #ifdef DEBUG_BOARD_INIT printf("%s: Done\n", __func__); #endif - printf("bdloc %016lx\n", (unsigned long)bdloc); + printf("bdloc " RAM_ADDR_FMT "\n", bdloc); } static QEMUMachine ref405ep_machine = { @@ -547,7 +548,7 @@ static void taihu_405ep_init(ram_addr_t ram_size, bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", bios_size); #ifdef DEBUG_BOARD_INIT printf("Register parallel flash %d size %lx" - " at offset %08lx addr %lx '%s' %d\n", + " at offset " RAM_ADDR_FMT " addr %lx '%s' %d\n", fl_idx, bios_size, bios_offset, -bios_size, bdrv_get_device_name(dinfo->bdrv), fl_sectors); #endif @@ -590,7 +591,7 @@ static void taihu_405ep_init(ram_addr_t ram_size, fl_sectors = (bios_size + 65535) >> 16; #ifdef DEBUG_BOARD_INIT printf("Register parallel flash %d size %lx" - " at offset %08lx addr " TARGET_FMT_lx " '%s'\n", + " at offset " RAM_ADDR_FMT " addr " TARGET_FMT_lx " '%s'\n", fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000, bdrv_get_device_name(dinfo->bdrv)); #endif -- 1.7.5.4