From: Max Filippov <jcmvbkbc@gmail.com>
To: qemu-devel@nongnu.org
Cc: jcmvbkbc@gmail.com
Subject: [Qemu-devel] [PATCH v5 18/33] target-xtensa: implement RST2 group (32 bit mul/div/rem)
Date: Tue, 6 Sep 2011 03:55:42 +0400 [thread overview]
Message-ID: <1315266957-22979-19-git-send-email-jcmvbkbc@gmail.com> (raw)
In-Reply-To: <1315266957-22979-1-git-send-email-jcmvbkbc@gmail.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
target-xtensa/translate.c | 77 ++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 76 insertions(+), 1 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index dccd453..bc04a10 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -878,7 +878,82 @@ static void disas_xtensa_insn(DisasContext *dc)
break;
case 2: /*RST2*/
- TBD();
+ if (OP2 >= 12) {
+ HAS_OPTION(XTENSA_OPTION_32_BIT_IDIV);
+ int label = gen_new_label();
+ tcg_gen_brcondi_i32(TCG_COND_NE, cpu_R[RRR_T], 0, label);
+ gen_exception_cause(dc, INTEGER_DIVIDE_BY_ZERO_CAUSE);
+ gen_set_label(label);
+ }
+
+ switch (OP2) {
+ case 8: /*MULLi*/
+ HAS_OPTION(XTENSA_OPTION_32_BIT_IMUL);
+ tcg_gen_mul_i32(cpu_R[RRR_R], cpu_R[RRR_S], cpu_R[RRR_T]);
+ break;
+
+ case 10: /*MULUHi*/
+ case 11: /*MULSHi*/
+ HAS_OPTION(XTENSA_OPTION_32_BIT_IMUL);
+ {
+ TCGv_i64 r = tcg_temp_new_i64();
+ TCGv_i64 s = tcg_temp_new_i64();
+ TCGv_i64 t = tcg_temp_new_i64();
+
+ if (OP2 == 10) {
+ tcg_gen_extu_i32_i64(s, cpu_R[RRR_S]);
+ tcg_gen_extu_i32_i64(t, cpu_R[RRR_T]);
+ } else {
+ tcg_gen_ext_i32_i64(s, cpu_R[RRR_S]);
+ tcg_gen_ext_i32_i64(t, cpu_R[RRR_T]);
+ }
+ tcg_gen_mul_i64(r, s, t);
+ tcg_gen_shri_i64(r, r, 32);
+ tcg_gen_trunc_i64_i32(cpu_R[RRR_R], r);
+
+ tcg_temp_free_i64(r);
+ tcg_temp_free_i64(s);
+ tcg_temp_free_i64(t);
+ }
+ break;
+
+ case 12: /*QUOUi*/
+ tcg_gen_divu_i32(cpu_R[RRR_R], cpu_R[RRR_S], cpu_R[RRR_T]);
+ break;
+
+ case 13: /*QUOSi*/
+ case 15: /*REMSi*/
+ {
+ int label1 = gen_new_label();
+ int label2 = gen_new_label();
+
+ tcg_gen_brcondi_i32(TCG_COND_NE, cpu_R[RRR_S], 0x80000000,
+ label1);
+ tcg_gen_brcondi_i32(TCG_COND_NE, cpu_R[RRR_T], 0xffffffff,
+ label1);
+ tcg_gen_movi_i32(cpu_R[RRR_R],
+ OP2 == 13 ? 0x80000000 : 0);
+ tcg_gen_br(label2);
+ gen_set_label(label1);
+ if (OP2 == 13) {
+ tcg_gen_div_i32(cpu_R[RRR_R],
+ cpu_R[RRR_S], cpu_R[RRR_T]);
+ } else {
+ tcg_gen_rem_i32(cpu_R[RRR_R],
+ cpu_R[RRR_S], cpu_R[RRR_T]);
+ }
+ gen_set_label(label2);
+ }
+ break;
+
+ case 14: /*REMUi*/
+ tcg_gen_remu_i32(cpu_R[RRR_R], cpu_R[RRR_S], cpu_R[RRR_T]);
+ break;
+
+ default: /*reserved*/
+ RESERVED();
+ break;
+ }
break;
case 3: /*RST3*/
--
1.7.6
next prev parent reply other threads:[~2011-09-05 23:56 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-05 23:55 [Qemu-devel] [PATCH v5 00/32] target-xtensa: new target architecture Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 01/33] target-xtensa: add target stubs Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 02/33] target-xtensa: add target to the configure script Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 03/33] target-xtensa: implement disas_xtensa_insn Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 04/33] target-xtensa: implement narrow instructions Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 05/33] target-xtensa: implement RT0 group Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 06/33] target-xtensa: add sample board Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 07/33] target-xtensa: implement conditional jumps Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 08/33] target-xtensa: implement JX/RET0/CALLX Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 09/33] target-xtensa: add special and user registers Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 10/33] target-xtensa: implement RST3 group Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 11/33] target-xtensa: implement shifts (ST1 and RST1 groups) Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 12/33] target-xtensa: implement LSAI group Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 13/33] target-xtensa: mark reserved and TBD opcodes Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 14/33] target-xtensa: implement SYNC group Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 15/33] target-xtensa: implement CACHE group Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 16/33] target-xtensa: add PS register and access control Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 17/33] target-xtensa: implement exceptions Max Filippov
2011-09-05 23:55 ` Max Filippov [this message]
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 19/33] target-xtensa: implement windowed registers Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 20/33] target-xtensa: implement loop option Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 21/33] target-xtensa: implement extended L32R Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 22/33] target-xtensa: implement unaligned exception option Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 23/33] target-xtensa: implement SIMCALL Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 24/33] target-xtensa: implement interrupt option Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 25/33] target-xtensa: implement accurate window check Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 26/33] target-xtensa: implement CPENABLE and PRID SRs Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 27/33] target-xtensa: implement relocatable vectors Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 28/33] target-xtensa: add gdb support Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 29/33] target-xtensa: implement memory protection options Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 30/33] target-xtensa: implement boolean option Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 31/33] target-xtensa: add dc232b core and board Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 32/33] MAINTAINERS: add xtensa maintainer Max Filippov
2011-09-05 23:55 ` [Qemu-devel] [PATCH v5 33/33] target-xtensa: add regression testsuite Max Filippov
2011-09-10 18:36 ` [Qemu-devel] [PATCH v5 00/32] target-xtensa: new target architecture Blue Swirl
2011-09-10 20:55 ` Stefan Weil
2011-09-11 18:06 ` Max Filippov
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