From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:43475) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R514F-0001oC-JX for qemu-devel@nongnu.org; Sat, 17 Sep 2011 16:00:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R514E-0007iX-Do for qemu-devel@nongnu.org; Sat, 17 Sep 2011 16:00:51 -0400 Received: from v220110690675601.yourvserver.net ([78.47.199.172]:56004) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R514E-0007i2-67 for qemu-devel@nongnu.org; Sat, 17 Sep 2011 16:00:50 -0400 From: Stefan Weil Date: Sat, 17 Sep 2011 22:00:28 +0200 Message-Id: <1316289634-18786-2-git-send-email-weil@mail.berlios.de> In-Reply-To: <4E74FC29.1050003@mail.berlios.de> References: <4E74FC29.1050003@mail.berlios.de> Subject: [Qemu-devel] [PATCH 2/8] tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: QEMU Developers It is now declared for all tcg targets in tcg.h, so the tcg target specific declarations are redundant. Signed-off-by: Stefan Weil --- tcg/arm/tcg-target.h | 1 - tcg/hppa/tcg-target.h | 4 +--- tcg/ia64/tcg-target.h | 2 -- tcg/mips/tcg-target.h | 1 - tcg/ppc/tcg-target.h | 1 - tcg/ppc64/tcg-target.h | 1 - tcg/s390/tcg-target.h | 6 ------ tcg/sparc/tcg-target.h | 6 ------ 8 files changed, 1 insertions(+), 21 deletions(-) diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 0e0f69a..33afd97 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -24,7 +24,6 @@ */ #define TCG_TARGET_ARM 1 -#define TCG_TARGET_REG_BITS 32 #undef TCG_TARGET_WORDS_BIGENDIAN #undef TCG_TARGET_STACK_GROWSUP diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h index ed90efc..ec9a7bf 100644 --- a/tcg/hppa/tcg-target.h +++ b/tcg/hppa/tcg-target.h @@ -24,9 +24,7 @@ #define TCG_TARGET_HPPA 1 -#if defined(_PA_RISC1_1) -#define TCG_TARGET_REG_BITS 32 -#else +#if TCG_TARGET_REG_BITS != 32 #error unsupported #endif diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h index ddc93c1..578cf29 100644 --- a/tcg/ia64/tcg-target.h +++ b/tcg/ia64/tcg-target.h @@ -24,8 +24,6 @@ */ #define TCG_TARGET_IA64 1 -#define TCG_TARGET_REG_BITS 64 - /* We only map the first 64 registers */ #define TCG_TARGET_NB_REGS 64 enum { diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 43c5501..e2a2571 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -25,7 +25,6 @@ */ #define TCG_TARGET_MIPS 1 -#define TCG_TARGET_REG_BITS 32 #ifdef __MIPSEB__ # define TCG_TARGET_WORDS_BIGENDIAN #endif diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index f9a88c4..5c2d612 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -23,7 +23,6 @@ */ #define TCG_TARGET_PPC 1 -#define TCG_TARGET_REG_BITS 32 #define TCG_TARGET_WORDS_BIGENDIAN #define TCG_TARGET_NB_REGS 32 diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h index 5395131..8d1fb73 100644 --- a/tcg/ppc64/tcg-target.h +++ b/tcg/ppc64/tcg-target.h @@ -23,7 +23,6 @@ */ #define TCG_TARGET_PPC64 1 -#define TCG_TARGET_REG_BITS 64 #define TCG_TARGET_WORDS_BIGENDIAN #define TCG_TARGET_NB_REGS 32 diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 35ebac3..e4cd641 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -23,12 +23,6 @@ */ #define TCG_TARGET_S390 1 -#ifdef __s390x__ -#define TCG_TARGET_REG_BITS 64 -#else -#define TCG_TARGET_REG_BITS 32 -#endif - #define TCG_TARGET_WORDS_BIGENDIAN typedef enum TCGReg { diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 7b4e7f9..1464ef4 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -23,12 +23,6 @@ */ #define TCG_TARGET_SPARC 1 -#if defined(__sparc_v9__) && !defined(__sparc_v8plus__) -#define TCG_TARGET_REG_BITS 64 -#else -#define TCG_TARGET_REG_BITS 32 -#endif - #define TCG_TARGET_WORDS_BIGENDIAN #define TCG_TARGET_NB_REGS 32 -- 1.7.2.5