From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:40990) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R5Inp-0002vF-H7 for qemu-devel@nongnu.org; Sun, 18 Sep 2011 10:57:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R5Ino-0007Tm-EK for qemu-devel@nongnu.org; Sun, 18 Sep 2011 10:57:05 -0400 Received: from smtp5-g21.free.fr ([212.27.42.5]:56473) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R5Inn-0007TU-Rw for qemu-devel@nongnu.org; Sun, 18 Sep 2011 10:57:04 -0400 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Sun, 18 Sep 2011 16:56:40 +0200 Message-Id: <1316357803-2366-9-git-send-email-hpoussin@reactos.org> In-Reply-To: <1316357803-2366-1-git-send-email-hpoussin@reactos.org> References: <1316357803-2366-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 08/11] malta: improve bus implementation of PIIX4 bridge List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Signed-off-by: Herv=C3=A9 Poussineau --- hw/mips_malta.c | 3 +-- hw/pc.h | 2 +- hw/piix4.c | 23 +++++++++++++++++++++-- 3 files changed, 23 insertions(+), 5 deletions(-) diff --git a/hw/mips_malta.c b/hw/mips_malta.c index e7cdf20..65e5915 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -939,8 +939,7 @@ void mips_malta_init (ram_addr_t ram_size, /* Southbridge */ ide_drive_get(hd, MAX_IDE_BUS); =20 - piix4_devfn =3D piix4_init(pci_bus, 80); - isa_bus_irqs(i8259); + piix4_devfn =3D piix4_init(pci_bus, 80, i8259); pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); usb_uhci_piix4_init(pci_bus, piix4_devfn + 2); smbus =3D piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_ir= q(9), diff --git a/hw/pc.h b/hw/pc.h index 5489039..8d1573f 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -194,7 +194,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, i= nt *piix_devfn, =20 /* piix4.c */ extern PCIDevice *piix4_dev; -int piix4_init(PCIBus *bus, int devfn); +int piix4_init(PCIBus *bus, int devfn, qemu_irq *isa_irqs); =20 /* vga.c */ enum vga_retrace_method { diff --git a/hw/piix4.c b/hw/piix4.c index 984de8b..f6437ce 100644 --- a/hw/piix4.c +++ b/hw/piix4.c @@ -32,6 +32,8 @@ PCIDevice *piix4_dev; =20 typedef struct PIIX4State { PCIDevice dev; + ISABus bus; + qemu_irq *isa_irq; } PIIX4State; =20 static void piix4_reset(void *opaque) @@ -83,21 +85,38 @@ static const VMStateDescription vmstate_piix4 =3D { } }; =20 +static qemu_irq pci_piix4_get_irq(ISABus *bus, int isairq) +{ + PIIX4State *s =3D container_of(bus, PIIX4State, bus); + if (isairq < 0 || isairq >=3D 16) { + hw_error("isa irq %d invalid", isairq); + } + return s->isa_irq[isairq]; +} + +static ISABusOps pci_piix4_ops =3D { + .get_irq =3D pci_piix4_get_irq, +}; + static int piix4_initfn(PCIDevice *dev) { PIIX4State *d =3D DO_UPCAST(PIIX4State, dev, dev); =20 - isa_bus_bridge_init(&d->dev.qdev); + isa_bus_new(&d->bus, &pci_piix4_ops, &d->dev.qdev); piix4_dev =3D &d->dev; qemu_register_reset(piix4_reset, d); return 0; } =20 -int piix4_init(PCIBus *bus, int devfn) +int piix4_init(PCIBus *bus, int devfn, qemu_irq *isa_irqs) { PCIDevice *d; + PIIX4State *s; =20 d =3D pci_create_simple_multifunction(bus, devfn, true, "PIIX4"); + s =3D DO_UPCAST(PIIX4State, dev, d); + s->isa_irq =3D isa_irqs; + return d->devfn; } =20 --=20 1.7.5.4