From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Alexander Graf <agraf@suse.de>
Cc: Jan Kiszka <jan.kiszka@siemens.com>,
qemu-ppc@nongnu.org,
qemu-devel Developers <qemu-devel@nongnu.org>,
kvm <kvm@vger.kernel.org>, David Gibson <dwg@au1.ibm.com>
Subject: Re: [Qemu-devel] qemu-kvm: Role of flush_icache_range on PPC
Date: Thu, 29 Sep 2011 06:58:44 +1000 [thread overview]
Message-ID: <1317243524.29415.96.camel@pasglop> (raw)
In-Reply-To: <5B15DB32-18DF-4637-AD37-4BE652A031E3@suse.de>
On Wed, 2011-09-28 at 16:26 +0200, Alexander Graf wrote:
>
> This makes sure that when device emulation overwrites code that is
> already present in the cache of a CPU, it gets flushed from the
> icache. I'm fairly sure we want that :). But let's ask Ben and David
> as well.
Hrm we don't need that. DMA doesn't flush the icache on power. The
kernel will take care of it if necessary.
The only case you do need it is when doing the initial load of the
kernel or SLOF image before you execute it.
Cheers,
Ben.
prev parent reply other threads:[~2011-09-28 21:00 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-28 14:23 [Qemu-devel] qemu-kvm: Role of flush_icache_range on PPC Jan Kiszka
2011-09-28 14:26 ` Alexander Graf
2011-09-28 14:45 ` Jan Kiszka
2011-09-28 14:49 ` Jan Kiszka
2011-09-28 14:57 ` Alexander Graf
2011-09-28 17:27 ` Scott Wood
2011-09-28 21:02 ` Benjamin Herrenschmidt
2011-09-28 21:20 ` Scott Wood
2011-09-28 21:34 ` Benjamin Herrenschmidt
2011-09-28 20:58 ` Benjamin Herrenschmidt [this message]
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