From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:59332) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R91HT-0004Q4-Ju for qemu-devel@nongnu.org; Wed, 28 Sep 2011 17:03:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R91HS-0004SY-IM for qemu-devel@nongnu.org; Wed, 28 Sep 2011 17:03:03 -0400 From: Benjamin Herrenschmidt In-Reply-To: <4E8358FD.6030408@freescale.com> References: <4E832DE3.40503@siemens.com> <5B15DB32-18DF-4637-AD37-4BE652A031E3@suse.de> <4E83330C.2080901@siemens.com> <4E8358FD.6030408@freescale.com> Content-Type: text/plain; charset="UTF-8" Date: Thu, 29 Sep 2011 07:02:35 +1000 Message-ID: <1317243755.29415.99.camel@pasglop> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] qemu-kvm: Role of flush_icache_range on PPC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Scott Wood Cc: kvm , qemu-devel Developers , Jan Kiszka , Alexander Graf , David Gibson , "qemu-ppc@nongnu.org" On Wed, 2011-09-28 at 12:27 -0500, Scott Wood wrote: > Why would it need to be synchronous? Even if it's asynchronous emulated > DMA, we don't want it sitting around only in a data cache that > instruction fetches won't snoop. Except that this is exactly what happens on real HW :-) The guest will do the necessary invalidations. DMA doesn't keep the icache coherent on HW, why should it on kvm/qemu ? > It's not implemented yet in mainline for powerpc (we have something > internal that is on the backlog of things to be cleaned up and sent > out), but this is what we'd do for kvm_arch_insert_sw_breakpoint(). Yes, breakpoints do need a flash, as does the initial program load. Cheers, Ben.