From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:51252) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAN0l-00079u-FX for qemu-devel@nongnu.org; Sun, 02 Oct 2011 10:27:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RAN0h-0008DO-7Y for qemu-devel@nongnu.org; Sun, 02 Oct 2011 10:27:22 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49838) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAN0f-0008C6-4S for qemu-devel@nongnu.org; Sun, 02 Oct 2011 10:27:17 -0400 From: Avi Kivity Date: Sun, 2 Oct 2011 16:26:54 +0200 Message-Id: <1317565616-12997-24-git-send-email-avi@redhat.com> In-Reply-To: <1317565616-12997-1-git-send-email-avi@redhat.com> References: <1317565616-12997-1-git-send-email-avi@redhat.com> Subject: [Qemu-devel] [PATCH 23/25] milkymist-uart: convert to memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, Anthony Liguori From: Michael Walle Signed-off-by: Michael Walle Signed-off-by: Avi Kivity --- hw/milkymist-uart.c | 33 +++++++++++++++++---------------- 1 files changed, 17 insertions(+), 16 deletions(-) diff --git a/hw/milkymist-uart.c b/hw/milkymist-uart.c index e8e309d..128cd8c 100644 --- a/hw/milkymist-uart.c +++ b/hw/milkymist-uart.c @@ -35,7 +35,9 @@ enum { struct MilkymistUartState { SysBusDevice busdev; + MemoryRegion regs_region; CharDriverState *chr; + qemu_irq rx_irq; qemu_irq tx_irq; @@ -43,7 +45,8 @@ struct MilkymistUartState { }; typedef struct MilkymistUartState MilkymistUartState; -static uint32_t uart_read(void *opaque, target_phys_addr_t addr) +static uint64_t uart_read(void *opaque, target_phys_addr_t addr, + unsigned size) { MilkymistUartState *s = opaque; uint32_t r = 0; @@ -66,7 +69,8 @@ static uint32_t uart_read(void *opaque, target_phys_addr_t addr) return r; } -static void uart_write(void *opaque, target_phys_addr_t addr, uint32_t value) +static void uart_write(void *opaque, target_phys_addr_t addr, uint64_t value, + unsigned size) { MilkymistUartState *s = opaque; unsigned char ch = value; @@ -93,16 +97,14 @@ static void uart_write(void *opaque, target_phys_addr_t addr, uint32_t value) } } -static CPUReadMemoryFunc * const uart_read_fn[] = { - NULL, - NULL, - &uart_read, -}; - -static CPUWriteMemoryFunc * const uart_write_fn[] = { - NULL, - NULL, - &uart_write, +static const MemoryRegionOps uart_mmio_ops = { + .read = uart_read, + .write = uart_write, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; static void uart_rx(void *opaque, const uint8_t *buf, int size) @@ -136,14 +138,13 @@ static void milkymist_uart_reset(DeviceState *d) static int milkymist_uart_init(SysBusDevice *dev) { MilkymistUartState *s = FROM_SYSBUS(typeof(*s), dev); - int uart_regs; sysbus_init_irq(dev, &s->rx_irq); sysbus_init_irq(dev, &s->tx_irq); - uart_regs = cpu_register_io_memory(uart_read_fn, uart_write_fn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, R_MAX * 4, uart_regs); + memory_region_init_io(&s->regs_region, &uart_mmio_ops, s, + "milkymist-uart", R_MAX * 4); + sysbus_init_mmio_region(dev, &s->regs_region); s->chr = qdev_init_chardev(&dev->qdev); if (s->chr) { -- 1.7.6.3