From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:54314) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAOcr-0005C3-Ho for qemu-devel@nongnu.org; Sun, 02 Oct 2011 12:10:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RAOcq-000885-GK for qemu-devel@nongnu.org; Sun, 02 Oct 2011 12:10:49 -0400 Received: from smtp5-g21.free.fr ([212.27.42.5]:45998) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAOcp-00086E-Td for qemu-devel@nongnu.org; Sun, 02 Oct 2011 12:10:48 -0400 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Sun, 2 Oct 2011 18:10:17 +0200 Message-Id: <1317571828-9059-6-git-send-email-hpoussin@reactos.org> In-Reply-To: <1317571828-9059-1-git-send-email-hpoussin@reactos.org> References: <1317571828-9059-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 05/16] pc: improve bus implementation of PIIX3 bridge List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Signed-off-by: Herv=C3=A9 Poussineau --- hw/pc.h | 2 +- hw/pc_piix.c | 3 ++- hw/piix_pci.c | 45 ++++++++++++++++++++++++++++++++++++++++----- 3 files changed, 43 insertions(+), 7 deletions(-) diff --git a/hw/pc.h b/hw/pc.h index c546037..746973f 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -181,7 +181,7 @@ struct PCII440FXState; typedef struct PCII440FXState PCII440FXState; =20 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, - qemu_irq *pic, + ISABus **isa_bus, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, ram_addr_t ram_size, diff --git a/hw/pc_piix.c b/hw/pc_piix.c index f971d52..7ccbfca 100644 --- a/hw/pc_piix.c +++ b/hw/pc_piix.c @@ -84,6 +84,7 @@ static void pc_init1(MemoryRegion *system_memory, int i; ram_addr_t below_4g_mem_size, above_4g_mem_size; PCIBus *pci_bus; + ISABus *isa_bus; PCII440FXState *i440fx_state; int piix3_devfn =3D -1; qemu_irq *cpu_irq; @@ -134,7 +135,7 @@ static void pc_init1(MemoryRegion *system_memory, isa_irq =3D qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24); =20 if (pci_enabled) { - pci_bus =3D i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, + pci_bus =3D i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, system_memory, system_io, ram_size, below_4g_mem_size, 0x100000000ULL - below_4g_mem_size, diff --git a/hw/piix_pci.c b/hw/piix_pci.c index 287bd19..76464f6 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -30,6 +30,7 @@ #include "sysbus.h" #include "range.h" #include "xen.h" +#include "exec-memory.h" =20 /* * I440FX chipset data sheet. @@ -45,6 +46,7 @@ typedef PCIHostState I440FXState; =20 typedef struct PIIX3State { PCIDevice dev; + ISABus bus; =20 /* * bitmap to track pic levels. @@ -263,7 +265,7 @@ static int i440fx_initfn(PCIDevice *dev) static PCIBus *i440fx_common_init(const char *device_name, PCII440FXState **pi440fx_state, int *piix3_devfn, - qemu_irq *pic, + ISABus **isa_bus, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, ram_addr_t ram_size, @@ -324,7 +326,7 @@ static PCIBus *i440fx_common_init(const char *device_= name, pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3, PIIX_NUM_PIRQS); } - piix3->pic =3D pic; + *isa_bus =3D &piix3->bus; =20 (*pi440fx_state)->piix3 =3D piix3; =20 @@ -341,7 +343,7 @@ static PCIBus *i440fx_common_init(const char *device_= name, } =20 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, - qemu_irq *pic, + ISABus **isa_bus, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, ram_addr_t ram_size, @@ -354,7 +356,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, i= nt *piix3_devfn, { PCIBus *b; =20 - b =3D i440fx_common_init("i440FX", pi440fx_state, piix3_devfn, pic, + b =3D i440fx_common_init("i440FX", pi440fx_state, piix3_devfn, isa_b= us, address_space_mem, address_space_io, ram_size= , pci_hole_start, pci_hole_size, pci_hole64_size, pci_hole64_size, @@ -500,11 +502,44 @@ static const VMStateDescription vmstate_piix3 =3D { } }; =20 +static void piix3_bus_set_irqs(ISABus *bus, qemu_irq *irqs) +{ + PIIX3State *d =3D container_of(bus, PIIX3State, bus); + d->pic =3D irqs; +} + +static qemu_irq piix3_bus_get_irq(ISABus *bus, int isairq) +{ + PIIX3State *d =3D container_of(bus, PIIX3State, bus); + if (isairq < 0 || isairq >=3D PIIX_NUM_PIC_IRQS) { + hw_error("isa irq %d invalid", isairq); + } + return d->pic[isairq]; +} + +static MemoryRegion *piix3_bus_get_io_space(ISABus *bus) +{ + PIIX3State *d =3D container_of(bus, PIIX3State, bus); + return pci_address_space_io(&d->dev); +} + +static MemoryRegion *piix3_bus_get_memory_space(ISABus *bus) +{ + return get_system_memory(); +} + +static ISABusOps piix3_bus_ops =3D { + .set_irqs =3D piix3_bus_set_irqs, + .get_irq =3D piix3_bus_get_irq, + .get_io_space =3D piix3_bus_get_io_space, + .get_memory_space =3D piix3_bus_get_memory_space, +}; + static int piix3_initfn(PCIDevice *dev) { PIIX3State *d =3D DO_UPCAST(PIIX3State, dev, dev); =20 - isa_bus_bridge_init(&d->dev.qdev, pci_address_space_io(dev)); + isa_bus_new(&d->bus, &piix3_bus_ops, &dev->qdev); qemu_register_reset(piix3_reset, d); return 0; } --=20 1.7.6.3