From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:54358) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAOcz-0005iD-PK for qemu-devel@nongnu.org; Sun, 02 Oct 2011 12:10:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RAOcy-0008BD-CX for qemu-devel@nongnu.org; Sun, 02 Oct 2011 12:10:57 -0400 Received: from smtp5-g21.free.fr ([212.27.42.5]:46211) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAOcx-0008Ar-0z for qemu-devel@nongnu.org; Sun, 02 Oct 2011 12:10:55 -0400 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Sun, 2 Oct 2011 18:10:19 +0200 Message-Id: <1317571828-9059-8-git-send-email-hpoussin@reactos.org> In-Reply-To: <1317571828-9059-1-git-send-email-hpoussin@reactos.org> References: <1317571828-9059-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 07/16] sun4u: improve bus implementation of EBus bridge List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Signed-off-by: Herv=C3=A9 Poussineau --- hw/sun4u.c | 37 +++++++++++++++++++++++++++++++------ 1 files changed, 31 insertions(+), 6 deletions(-) diff --git a/hw/sun4u.c b/hw/sun4u.c index cdf15ff..d8b8054 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -38,6 +38,7 @@ #include "loader.h" #include "elf.h" #include "blockdev.h" +#include "exec-memory.h" =20 //#define DEBUG_IRQ //#define DEBUG_EBUS @@ -93,6 +94,8 @@ struct hwdef { =20 typedef struct EbusState { PCIDevice pci_dev; + ISABus bus; + qemu_irq *isa_irq; MemoryRegion bar0; MemoryRegion bar1; } EbusState; @@ -536,20 +539,42 @@ static void dummy_isa_irq_handler(void *opaque, int= n, int level) static void pci_ebus_init(PCIBus *bus, int devfn) { - qemu_irq *isa_irq; - pci_create_simple(bus, devfn, "ebus"); - isa_irq =3D qemu_allocate_irqs(dummy_isa_irq_handler, NULL, 16); - isa_bus_irqs(isa_irq); } =20 +static qemu_irq pci_ebus_get_irq(ISABus *bus, int isairq) +{ + EbusState *s =3D container_of(bus, EbusState, bus); + if (isairq < 0 || isairq >=3D 16) { + hw_error("isa irq %d invalid", isairq); + } + return s->isa_irq[isairq]; +} + +static MemoryRegion *pci_ebus_get_io_space(ISABus *bus) +{ + EbusState *s =3D container_of(bus, EbusState, bus); + return pci_address_space_io(&s->pci_dev); +} + +static MemoryRegion *pci_ebus_get_memory_space(ISABus *bus) +{ + return get_system_memory(); +} + +static ISABusOps pci_ebus_ops =3D { + .get_irq =3D pci_ebus_get_irq, + .get_io_space =3D pci_ebus_get_io_space, + .get_memory_space =3D pci_ebus_get_memory_space, +}; + static int pci_ebus_init1(PCIDevice *pci_dev) { EbusState *s =3D DO_UPCAST(EbusState, pci_dev, pci_dev); =20 - isa_bus_bridge_init(&pci_dev->qdev, pci_address_space_io(pci_dev)); - + isa_bus_new(&s->bus, &pci_ebus_ops, &pci_dev->qdev); + s->isa_irq =3D qemu_allocate_irqs(dummy_isa_irq_handler, NULL, 16); pci_dev->config[0x04] =3D 0x06; // command =3D bus master, pci mem pci_dev->config[0x05] =3D 0x00; pci_dev->config[0x06] =3D 0xa0; // status =3D fast back-to-back, 66M= Hz, no error --=20 1.7.6.3