From: Alexander Graf <agraf@suse.de>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [PATCH 43/64] KVM: Update kernel headers
Date: Thu, 6 Oct 2011 10:05:45 +0200 [thread overview]
Message-ID: <1317888366-10509-44-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1317888366-10509-1-git-send-email-agraf@suse.de>
Another round of KVM features, another round of kernel header updates :)
Signed-off-by: Alexander Graf <agraf@suse.de>
---
| 40 +++++++++++++++++++++++++++++++++++++++
| 18 +++++++++++++++++
2 files changed, 58 insertions(+), 0 deletions(-)
--git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kvm.h
index 579e219..28eecf0 100644
--- a/linux-headers/asm-powerpc/kvm.h
+++ b/linux-headers/asm-powerpc/kvm.h
@@ -284,6 +284,11 @@ struct kvm_guest_debug_arch {
#define KVM_INTERRUPT_UNSET -2U
#define KVM_INTERRUPT_SET_LEVEL -3U
+#define KVM_CPU_440 1
+#define KVM_CPU_E500V2 2
+#define KVM_CPU_3S_32 3
+#define KVM_CPU_3S_64 4
+
/* for KVM_CAP_SPAPR_TCE */
struct kvm_create_spapr_tce {
__u64 liobn;
@@ -295,4 +300,39 @@ struct kvm_allocate_rma {
__u64 rma_size;
};
+struct kvm_book3e_206_tlb_entry {
+ __u32 mas8;
+ __u32 mas1;
+ __u64 mas2;
+ __u64 mas7_3;
+};
+
+struct kvm_book3e_206_tlb_params {
+ /*
+ * For mmu types KVM_MMU_FSL_BOOKE_NOHV and KVM_MMU_FSL_BOOKE_HV:
+ *
+ * - The number of ways of TLB0 must be a power of two between 2 and
+ * 16.
+ * - TLB1 must be fully associative.
+ * - The size of TLB0 must be a multiple of the number of ways, and
+ * the number of sets must be a power of two.
+ * - The size of TLB1 may not exceed 64 entries.
+ * - TLB0 supports 4 KiB pages.
+ * - The page sizes supported by TLB1 are as indicated by
+ * TLB1CFG (if MMUCFG[MAVN] = 0) or TLB1PS (if MMUCFG[MAVN] = 1)
+ * as returned by KVM_GET_SREGS.
+ * - TLB2 and TLB3 are reserved, and their entries in tlb_sizes[]
+ * and tlb_ways[] must be zero.
+ *
+ * tlb_ways[n] = tlb_sizes[n] means the array is fully associative.
+ *
+ * KVM will adjust TLBnCFG based on the sizes configured here,
+ * though arrays greater than 2048 entries will have TLBnCFG[NENTRY]
+ * set to zero.
+ */
+ __u32 tlb_sizes[4];
+ __u32 tlb_ways[4];
+ __u32 reserved[8];
+};
+
#endif /* __LINUX_KVM_POWERPC_H */
--git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 2062375..8bb6cde 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -556,6 +556,7 @@ struct kvm_ppc_pvinfo {
#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */
#define KVM_CAP_PPC_HIOR 67
#define KVM_CAP_PPC_PAPR 68
+#define KVM_CAP_SW_TLB 69
#ifdef KVM_CAP_IRQ_ROUTING
@@ -635,6 +636,21 @@ struct kvm_clock_data {
__u32 pad[9];
};
+#define KVM_MMU_FSL_BOOKE_NOHV 0
+#define KVM_MMU_FSL_BOOKE_HV 1
+
+struct kvm_config_tlb {
+ __u64 params;
+ __u64 array;
+ __u32 mmu_type;
+ __u32 array_len;
+};
+
+struct kvm_dirty_tlb {
+ __u64 bitmap;
+ __u32 num_dirty;
+};
+
/*
* ioctls for VM fds
*/
@@ -761,6 +777,8 @@ struct kvm_clock_data {
#define KVM_CREATE_SPAPR_TCE _IOW(KVMIO, 0xa8, struct kvm_create_spapr_tce)
/* Available with KVM_CAP_RMA */
#define KVM_ALLOCATE_RMA _IOR(KVMIO, 0xa9, struct kvm_allocate_rma)
+/* Available with KVM_CAP_SW_TLB */
+#define KVM_DIRTY_TLB _IOW(KVMIO, 0xaa, struct kvm_dirty_tlb)
#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
--
1.6.0.2
next prev parent reply other threads:[~2011-10-06 8:06 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-10-06 8:05 [Qemu-devel] [PULL 00/64] ppc patch queue 2011-10-06 Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 01/64] spapr: proper qdevification Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 02/64] spapr: prepare for qdevification of irq Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 03/64] spapr: make irq customizable via qdev Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 04/64] PPC: Move openpic to target specific code compilation Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 05/64] PPC: Add CPU local MMIO regions to MPIC Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 06/64] PPC: Extend MPIC MMIO range Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 07/64] PPC: Fix IPI support in MPIC Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 08/64] PPC: Set MPIC IDE for IPI to 0 Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 09/64] PPC: MPIC: Remove read functionality for WO registers Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 10/64] PPC: MPIC: Fix CI bit definitions Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 11/64] PPC: Bump MPIC up to 32 supported CPUs Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 12/64] PPC: E500: create multiple envs Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 13/64] PPC: E500: Generate IRQ lines for many CPUs Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 14/64] device tree: add nop_node Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 15/64] PPC: bamboo: Move host fdt copy to target Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 16/64] PPC: KVM: Add generic function to read host clockfreq Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 17/64] PPC: E500: Use generic kvm function for freq Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 18/64] PPC: E500: Remove mpc8544_copy_soc_cell Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 19/64] PPC: bamboo: Use kvm api for freq and clock frequencies Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 20/64] PPC: KVM: Remove kvmppc_read_host_property Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 21/64] PPC: KVM: Add stubs for kvm helper functions Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 22/64] PPC: E500: Update freqs for all CPUs Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 23/64] PPC: E500: Remove unneeded CPU nodes Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 24/64] PPC: E500: Add PV spinning code Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 25/64] PPC: E500: Update cpu-release-addr property in cpu nodes Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 26/64] device tree: add add_subnode command Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 27/64] device tree: dont fail operations Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 28/64] device tree: give dt more size Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 29/64] MPC8544DS: Remove CPU nodes Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 30/64] MPC8544DS: Generate CPU nodes on init Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 31/64] PPC: E500: Bump CPU count to 15 Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 32/64] PPC: Add new target config for pseries Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 33/64] KVM: update kernel headers Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 34/64] PPC: Enable to use PAPR with PR style KVM Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 35/64] PPC: SPAPR: Use KVM function for time info Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 36/64] pseries: Bugfixes for interrupt numbering in XICS code Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 37/64] pseries: Add a phandle to the xicp interrupt controller device tree node Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 38/64] pseries: interrupt controller should not have a 'reg' property Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 39/64] pseries: More complete WIMG validation in H_ENTER code Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 40/64] PPC: Fix sync instructions problem in SMP Alexander Graf
2011-10-06 8:24 ` Elie Richa
2011-10-06 8:05 ` [Qemu-devel] [PATCH 41/64] pseries: Add real mode debugging hcalls Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 42/64] pseries: use macro for firmware filename Alexander Graf
2011-10-06 8:05 ` Alexander Graf [this message]
2011-10-06 8:05 ` [Qemu-devel] [PATCH 44/64] kvm: ppc: booke206: use MMU API Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 45/64] ppc: booke206: add "info tlb" support Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 46/64] ppc: booke206: use MAV=2.0 TSIZE definition, fix 4G pages Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 47/64] Implement POWER7's CFAR in TCG Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 48/64] pseries: Implement hcall-bulk hypervisor interface Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 49/64] vscsi: send the CHECK_CONDITION status down together with autosense data Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 50/64] Gdbstub: handle read of fpscr Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 51/64] ppc405: use RAM_ADDR_FMT instead of %08lx Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 52/64] openpic: Unfold read_IRQreg Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 53/64] openpic: Unfold write_IRQreg Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 54/64] ppc: move ADB stuff from ppc_mac.h to adb.h Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 55/64] PPC: Fix via-cuda memory registration Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 56/64] PPC: Fix heathrow PIC to use little endian MMIO Alexander Graf
2011-10-06 8:05 ` [Qemu-devel] [PATCH 57/64] KVM: Update kernel headers Alexander Graf
2011-10-06 8:06 ` [Qemu-devel] [PATCH 58/64] " Alexander Graf
2011-10-06 8:06 ` [Qemu-devel] [PATCH 59/64] KVM: PPC: Use HIOR setting for -M pseries with PR KVM Alexander Graf
2011-10-06 8:06 ` [Qemu-devel] [PATCH 60/64] PPC: booke timers Alexander Graf
2011-10-06 8:06 ` [Qemu-devel] [PATCH 61/64] PPC: Clean up BookE timer code Alexander Graf
2011-10-06 8:06 ` [Qemu-devel] [PATCH 62/64] pseries: Refactor spapr irq allocation Alexander Graf
2011-10-06 8:06 ` [Qemu-devel] [PATCH 63/64] pseries: Implement set-time-of-day RTAS function Alexander Graf
2011-10-06 8:06 ` [Qemu-devel] [PATCH 64/64] ppc64: Fix linker script Alexander Graf
2011-10-08 10:17 ` [Qemu-devel] [PULL 00/64] ppc patch queue 2011-10-06 Blue Swirl
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1317888366-10509-44-git-send-email-agraf@suse.de \
--to=agraf@suse.de \
--cc=blauwirbel@gmail.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).