From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52054) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RBl7I-0003Yx-I9 for qemu-devel@nongnu.org; Thu, 06 Oct 2011 06:23:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RBl7G-0002N7-Vb for qemu-devel@nongnu.org; Thu, 06 Oct 2011 06:23:52 -0400 Received: from mx1.redhat.com ([209.132.183.28]:27680) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RBl7G-0002Mp-N8 for qemu-devel@nongnu.org; Thu, 06 Oct 2011 06:23:50 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p96ANoNQ010157 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 6 Oct 2011 06:23:50 -0400 Received: from cleopatra.tlv.redhat.com (cleopatra.tlv.redhat.com [10.35.255.11]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p96ANn5O019228 for ; Thu, 6 Oct 2011 06:23:49 -0400 From: Avi Kivity Date: Thu, 6 Oct 2011 12:23:12 +0200 Message-Id: <1317896615-25202-3-git-send-email-avi@redhat.com> In-Reply-To: <1317896615-25202-1-git-send-email-avi@redhat.com> References: <1317896615-25202-1-git-send-email-avi@redhat.com> Subject: [Qemu-devel] [PATCH 02/25] PPC: Fix via-cuda memory registration List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Alexander Graf Commit 23c5e4ca (convert to memory API) broke the VIA Cuda emulation layer by not registering the IO structs. This patch registers them properly and thus makes -M g3beige and -M mac99 work again. Signed-off-by: Alexander Graf Signed-off-by: Avi Kivity --- hw/cuda.c | 28 ++++++++++++++++------------ 1 files changed, 16 insertions(+), 12 deletions(-) diff --git a/hw/cuda.c b/hw/cuda.c index 5c92d81..736de7f 100644 --- a/hw/cuda.c +++ b/hw/cuda.c @@ -633,16 +633,20 @@ static uint32_t cuda_readl (void *opaque, target_phys_addr_t addr) return 0; } -static CPUWriteMemoryFunc * const cuda_write[] = { - &cuda_writeb, - &cuda_writew, - &cuda_writel, -}; - -static CPUReadMemoryFunc * const cuda_read[] = { - &cuda_readb, - &cuda_readw, - &cuda_readl, +static MemoryRegionOps cuda_ops = { + .old_mmio = { + .write = { + cuda_writeb, + cuda_writew, + cuda_writel, + }, + .read = { + cuda_readb, + cuda_readw, + cuda_readl, + }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; static bool cuda_timer_exist(void *opaque, int version_id) @@ -739,8 +743,8 @@ void cuda_init (MemoryRegion **cuda_mem, qemu_irq irq) s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET; s->adb_poll_timer = qemu_new_timer_ns(vm_clock, cuda_adb_poll, s); - cpu_register_io_memory(cuda_read, cuda_write, s, - DEVICE_NATIVE_ENDIAN); + memory_region_init_io(&s->mem, &cuda_ops, s, "cuda", 0x2000); + *cuda_mem = &s->mem; vmstate_register(NULL, -1, &vmstate_cuda, s); qemu_register_reset(cuda_reset, s); -- 1.7.6.3