From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:36031) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RFpH2-0008Q5-6b for qemu-devel@nongnu.org; Mon, 17 Oct 2011 11:38:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RFpH1-0000b3-3X for qemu-devel@nongnu.org; Mon, 17 Oct 2011 11:38:44 -0400 Received: from mail-ww0-f53.google.com ([74.125.82.53]:42473) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RFpH0-0000at-VQ for qemu-devel@nongnu.org; Mon, 17 Oct 2011 11:38:43 -0400 Received: by wwi36 with SMTP id 36so1479143wwi.10 for ; Mon, 17 Oct 2011 08:38:42 -0700 (PDT) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= Date: Mon, 17 Oct 2011 17:28:27 +0200 Message-Id: <1318865312-27483-3-git-send-email-benoit.canet@gmail.com> In-Reply-To: <1318865312-27483-1-git-send-email-benoit.canet@gmail.com> References: <1318865312-27483-1-git-send-email-benoit.canet@gmail.com> Subject: [Qemu-devel] [PATCH 2/7] integratorcp: convert icp pic to memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com Signed-off-by: Benoit Canet --- hw/integratorcp.c | 27 ++++++++++----------------- 1 files changed, 10 insertions(+), 17 deletions(-) diff --git a/hw/integratorcp.c b/hw/integratorcp.c index 0dc84c4..c7d6596 100644 --- a/hw/integratorcp.c +++ b/hw/integratorcp.c @@ -279,6 +279,7 @@ static int integratorcm_init(SysBusDevice *dev) typedef struct icp_pic_state { SysBusDevice busdev; + MemoryRegion iomem; uint32_t level; uint32_t irq_enabled; uint32_t fiq_enabled; @@ -306,7 +307,8 @@ static void icp_pic_set_irq(void *opaque, int irq, int level) icp_pic_update(s); } -static uint32_t icp_pic_read(void *opaque, target_phys_addr_t offset) +static uint64_t icp_pic_read(void *opaque, target_phys_addr_t offset, + unsigned size) { icp_pic_state *s = (icp_pic_state *)opaque; @@ -335,7 +337,7 @@ static uint32_t icp_pic_read(void *opaque, target_phys_addr_t offset) } static void icp_pic_write(void *opaque, target_phys_addr_t offset, - uint32_t value) + uint64_t value, unsigned size) { icp_pic_state *s = (icp_pic_state *)opaque; @@ -371,30 +373,21 @@ static void icp_pic_write(void *opaque, target_phys_addr_t offset, icp_pic_update(s); } -static CPUReadMemoryFunc * const icp_pic_readfn[] = { - icp_pic_read, - icp_pic_read, - icp_pic_read -}; - -static CPUWriteMemoryFunc * const icp_pic_writefn[] = { - icp_pic_write, - icp_pic_write, - icp_pic_write +static const MemoryRegionOps icp_pic_ops = { + .read = icp_pic_read, + .write = icp_pic_write, + .endianness = DEVICE_NATIVE_ENDIAN, }; static int icp_pic_init(SysBusDevice *dev) { icp_pic_state *s = FROM_SYSBUS(icp_pic_state, dev); - int iomemtype; qdev_init_gpio_in(&dev->qdev, icp_pic_set_irq, 32); sysbus_init_irq(dev, &s->parent_irq); sysbus_init_irq(dev, &s->parent_fiq); - iomemtype = cpu_register_io_memory(icp_pic_readfn, - icp_pic_writefn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, 0x00800000, iomemtype); + memory_region_init_io(&s->iomem, &icp_pic_ops, s, "icp-pic", 0x00800000); + sysbus_init_mmio_region(dev, &s->iomem); return 0; } -- 1.7.5.4