From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:34557) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RJ4vs-0007zv-JX for qemu-devel@nongnu.org; Wed, 26 Oct 2011 10:58:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RJ4vq-0007aA-VT for qemu-devel@nongnu.org; Wed, 26 Oct 2011 10:58:20 -0400 Received: from mail-wy0-f173.google.com ([74.125.82.173]:47822) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RJ4vq-0007Q1-QD for qemu-devel@nongnu.org; Wed, 26 Oct 2011 10:58:18 -0400 Received: by mail-wy0-f173.google.com with SMTP id 15so1940368wyh.4 for ; Wed, 26 Oct 2011 07:58:18 -0700 (PDT) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= Date: Wed, 26 Oct 2011 16:56:35 +0200 Message-Id: <1319640996-26537-10-git-send-email-benoit.canet@gmail.com> In-Reply-To: <1319640996-26537-1-git-send-email-benoit.canet@gmail.com> References: <1319640996-26537-1-git-send-email-benoit.canet@gmail.com> Subject: [Qemu-devel] [PATCH 09/10] pxa2xx_mmci: convert to memory API. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com Convert mechanicaly; the access size of the old_mmio fields seems odd. Signed-off-by: Benoit Canet --- hw/pxa2xx_mmci.c | 28 ++++++++++++++-------------- 1 files changed, 14 insertions(+), 14 deletions(-) diff --git a/hw/pxa2xx_mmci.c b/hw/pxa2xx_mmci.c index 1de4979..58e6e29 100644 --- a/hw/pxa2xx_mmci.c +++ b/hw/pxa2xx_mmci.c @@ -11,8 +11,10 @@ #include "pxa.h" #include "sd.h" #include "qdev.h" +#include "exec-memory.h" struct PXA2xxMMCIState { + MemoryRegion iomem; qemu_irq irq; qemu_irq rx_dma; qemu_irq tx_dma; @@ -403,12 +405,6 @@ static uint32_t pxa2xx_mmci_readw(void *opaque, target_phys_addr_t offset) return pxa2xx_mmci_read(opaque, offset); } -static CPUReadMemoryFunc * const pxa2xx_mmci_readfn[] = { - pxa2xx_mmci_readb, - pxa2xx_mmci_readh, - pxa2xx_mmci_readw -}; - static void pxa2xx_mmci_writeb(void *opaque, target_phys_addr_t offset, uint32_t value) { @@ -433,10 +429,16 @@ static void pxa2xx_mmci_writew(void *opaque, pxa2xx_mmci_write(opaque, offset, value); } -static CPUWriteMemoryFunc * const pxa2xx_mmci_writefn[] = { - pxa2xx_mmci_writeb, - pxa2xx_mmci_writeh, - pxa2xx_mmci_writew +static const MemoryRegionOps pxa2xx_mmci_ops = { + .old_mmio = { + .read = { pxa2xx_mmci_readb, + pxa2xx_mmci_readh, + pxa2xx_mmci_readw, }, + .write = { pxa2xx_mmci_writeb, + pxa2xx_mmci_writeh, + pxa2xx_mmci_writew, }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; static void pxa2xx_mmci_save(QEMUFile *f, void *opaque) @@ -521,7 +523,6 @@ PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base, BlockDriverState *bd, qemu_irq irq, qemu_irq rx_dma, qemu_irq tx_dma) { - int iomemtype; PXA2xxMMCIState *s; s = (PXA2xxMMCIState *) g_malloc0(sizeof(PXA2xxMMCIState)); @@ -529,9 +530,8 @@ PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base, s->rx_dma = rx_dma; s->tx_dma = tx_dma; - iomemtype = cpu_register_io_memory(pxa2xx_mmci_readfn, - pxa2xx_mmci_writefn, s, DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(base, 0x00100000, iomemtype); + memory_region_init_io(&s->iomem, &pxa2xx_mmci_ops, s, "mmc", 0x00100000); + memory_region_add_subregion(get_system_memory(), base, &s->iomem); /* Instantiate the actual storage */ s->card = sd_init(bd, 0); -- 1.7.4.1