[Qemu-devel] [PATCH 3/9] pxa2xx_pcmcia.c: convert attribute memory space to memory API

["Benoît Canet" <benoit.canet@gmail.com>]

Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
---
 hw/pxa2xx_pcmcia.c |   31 ++++++++++++++-----------------
 1 files changed, 14 insertions(+), 17 deletions(-)

diff --git a/hw/pxa2xx_pcmcia.c b/hw/pxa2xx_pcmcia.c
index 6d1e96c..e5277ad 100644
--- a/hw/pxa2xx_pcmcia.c
+++ b/hw/pxa2xx_pcmcia.c
@@ -11,10 +11,12 @@
 #include "pcmcia.h"
 #include "pxa.h"
 
+
 struct PXA2xxPCMCIAState {
     PCMCIASocket slot;
     PCMCIACardState *card;
     MemoryRegion common_iomem;
+    MemoryRegion attr_iomem;
 
     qemu_irq irq;
     qemu_irq cd_irq;
@@ -42,8 +44,8 @@ static void pxa2xx_pcmcia_common_write(void *opaque, target_phys_addr_t offset,
     }
 }
 
-static uint32_t pxa2xx_pcmcia_attr_read(void *opaque,
-                target_phys_addr_t offset)
+static uint64_t pxa2xx_pcmcia_attr_read(void *opaque,
+                target_phys_addr_t offset, unsigned size)
 {
     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
 
@@ -54,8 +56,8 @@ static uint32_t pxa2xx_pcmcia_attr_read(void *opaque,
     return 0;
 }
 
-static void pxa2xx_pcmcia_attr_write(void *opaque,
-                target_phys_addr_t offset, uint32_t value)
+static void pxa2xx_pcmcia_attr_write(void *opaque, target_phys_addr_t offset,
+                                     uint64_t value, unsigned size)
 {
     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
 
@@ -92,16 +94,10 @@ static const MemoryRegionOps pxa2xx_pcmcia_common_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN
 };
 
-static CPUReadMemoryFunc * const pxa2xx_pcmcia_attr_readfn[] = {
-    pxa2xx_pcmcia_attr_read,
-    pxa2xx_pcmcia_attr_read,
-    pxa2xx_pcmcia_attr_read,
-};
-
-static CPUWriteMemoryFunc * const pxa2xx_pcmcia_attr_writefn[] = {
-    pxa2xx_pcmcia_attr_write,
-    pxa2xx_pcmcia_attr_write,
-    pxa2xx_pcmcia_attr_write,
+static const MemoryRegionOps pxa2xx_pcmcia_attr_ops = {
+    .read = pxa2xx_pcmcia_attr_read,
+    .write = pxa2xx_pcmcia_attr_write,
+    .endianness = DEVICE_NATIVE_ENDIAN
 };
 
 static CPUReadMemoryFunc * const pxa2xx_pcmcia_io_readfn[] = {
@@ -142,9 +138,10 @@ PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem,
     /* Then next 64 MB is reserved */
 
     /* Socket Attribute Memory Space */
-    iomemtype = cpu_register_io_memory(pxa2xx_pcmcia_attr_readfn,
-                    pxa2xx_pcmcia_attr_writefn, s, DEVICE_NATIVE_ENDIAN);
-    cpu_register_physical_memory(base | 0x08000000, 0x04000000, iomemtype);
+    memory_region_init_io(&s->attr_iomem, &pxa2xx_pcmcia_attr_ops, s,
+                          "pxa2xx-pcmcia-attribute", 0x04000000);
+    memory_region_add_subregion(sysmem, base | 0x08000000,
+                                &s->attr_iomem);
 
     /* Socket Common Memory Space */
     memory_region_init_io(&s->common_iomem, &pxa2xx_pcmcia_common_ops, s,
-- 
1.7.5.4