From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:55491) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RKWSj-00063q-P4 for qemu-devel@nongnu.org; Sun, 30 Oct 2011 10:34:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RKWSg-0003tf-AX for qemu-devel@nongnu.org; Sun, 30 Oct 2011 10:34:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:16646) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RKWSf-0003sc-8V for qemu-devel@nongnu.org; Sun, 30 Oct 2011 10:34:09 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p9UEY8DP021165 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Sun, 30 Oct 2011 10:34:08 -0400 Received: from cleopatra.tlv.redhat.com (cleopatra.tlv.redhat.com [10.35.255.11]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p9UEY7B7005304 for ; Sun, 30 Oct 2011 10:34:08 -0400 From: Avi Kivity Date: Sun, 30 Oct 2011 16:33:46 +0200 Message-Id: <1319985234-32371-10-git-send-email-avi@redhat.com> In-Reply-To: <1319985234-32371-1-git-send-email-avi@redhat.com> References: <1319985234-32371-1-git-send-email-avi@redhat.com> Subject: [Qemu-devel] [PATCH 09/17] pl011: convert to memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Signed-off-by: Avi Kivity --- hw/pl011.c | 27 ++++++++++----------------- 1 files changed, 10 insertions(+), 17 deletions(-) diff --git a/hw/pl011.c b/hw/pl011.c index 707a161..9cf6dea 100644 --- a/hw/pl011.c +++ b/hw/pl011.c @@ -12,6 +12,7 @@ typedef struct { SysBusDevice busdev; + MemoryRegion iomem; uint32_t readbuff; uint32_t flags; uint32_t lcr; @@ -53,7 +54,8 @@ static void pl011_update(pl011_state *s) qemu_set_irq(s->irq, flags != 0); } -static uint32_t pl011_read(void *opaque, target_phys_addr_t offset) +static uint64_t pl011_read(void *opaque, target_phys_addr_t offset, + unsigned size) { pl011_state *s = (pl011_state *)opaque; uint32_t c; @@ -123,7 +125,7 @@ static void pl011_set_read_trigger(pl011_state *s) } static void pl011_write(void *opaque, target_phys_addr_t offset, - uint32_t value) + uint64_t value, unsigned size) { pl011_state *s = (pl011_state *)opaque; unsigned char ch; @@ -223,16 +225,10 @@ static void pl011_event(void *opaque, int event) pl011_put_fifo(opaque, 0x400); } -static CPUReadMemoryFunc * const pl011_readfn[] = { - pl011_read, - pl011_read, - pl011_read -}; - -static CPUWriteMemoryFunc * const pl011_writefn[] = { - pl011_write, - pl011_write, - pl011_write +static const MemoryRegionOps pl011_ops = { + .read = pl011_read, + .write = pl011_write, + .endianness = DEVICE_NATIVE_ENDIAN, }; static const VMStateDescription vmstate_pl011 = { @@ -262,13 +258,10 @@ static void pl011_event(void *opaque, int event) static int pl011_init(SysBusDevice *dev, const unsigned char *id) { - int iomemtype; pl011_state *s = FROM_SYSBUS(pl011_state, dev); - iomemtype = cpu_register_io_memory(pl011_readfn, - pl011_writefn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, 0x1000,iomemtype); + memory_region_init_io(&s->iomem, &pl011_ops, s, "pl011", 0x1000); + sysbus_init_mmio_region(dev, &s->iomem); sysbus_init_irq(dev, &s->irq); s->id = id; s->chr = qdev_init_chardev(&dev->qdev); -- 1.7.6.3