qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Alexander Graf <agraf@suse.de>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>, Liu Yu <yu.liu@freescale.com>,
	qemu-ppc@nongnu.org
Subject: [Qemu-devel] [PATCH 01/22] ppc/e500_pci: Fix code style
Date: Sun, 30 Oct 2011 21:22:52 +0100	[thread overview]
Message-ID: <1320006193-15219-2-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1320006193-15219-1-git-send-email-agraf@suse.de>

From: Liu Yu-B13201 <Yu.Liu@freescale.com>

Put trailing statements on next line.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
Reviewed-by: Andreas Färber <andreas.faerber@web.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/ppce500_pci.c |   76 +++++++++++++++++++++++++++++++++++++++--------------
 1 files changed, 56 insertions(+), 20 deletions(-)

diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 2db365d..0ece422 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -98,11 +98,20 @@ static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr)
     case PPCE500_PCI_OW3:
     case PPCE500_PCI_OW4:
         switch (addr & 0xC) {
-        case PCI_POTAR: value = pci->pob[(addr >> 5) & 0x7].potar; break;
-        case PCI_POTEAR: value = pci->pob[(addr >> 5) & 0x7].potear; break;
-        case PCI_POWBAR: value = pci->pob[(addr >> 5) & 0x7].powbar; break;
-        case PCI_POWAR: value = pci->pob[(addr >> 5) & 0x7].powar; break;
-        default: break;
+        case PCI_POTAR:
+            value = pci->pob[(addr >> 5) & 0x7].potar;
+            break;
+        case PCI_POTEAR:
+            value = pci->pob[(addr >> 5) & 0x7].potear;
+            break;
+        case PCI_POWBAR:
+            value = pci->pob[(addr >> 5) & 0x7].powbar;
+            break;
+        case PCI_POWAR:
+            value = pci->pob[(addr >> 5) & 0x7].powar;
+            break;
+        default:
+            break;
         }
         break;
 
@@ -110,11 +119,20 @@ static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr)
     case PPCE500_PCI_IW2:
     case PPCE500_PCI_IW1:
         switch (addr & 0xC) {
-        case PCI_PITAR: value = pci->pib[(addr >> 5) & 0x3].pitar; break;
-        case PCI_PIWBAR: value = pci->pib[(addr >> 5) & 0x3].piwbar; break;
-        case PCI_PIWBEAR: value = pci->pib[(addr >> 5) & 0x3].piwbear; break;
-        case PCI_PIWAR: value = pci->pib[(addr >> 5) & 0x3].piwar; break;
-        default: break;
+        case PCI_PITAR:
+            value = pci->pib[(addr >> 5) & 0x3].pitar;
+            break;
+        case PCI_PIWBAR:
+            value = pci->pib[(addr >> 5) & 0x3].piwbar;
+            break;
+        case PCI_PIWBEAR:
+            value = pci->pib[(addr >> 5) & 0x3].piwbear;
+            break;
+        case PCI_PIWAR:
+            value = pci->pib[(addr >> 5) & 0x3].piwar;
+            break;
+        default:
+            break;
         };
         break;
 
@@ -154,11 +172,20 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr,
     case PPCE500_PCI_OW3:
     case PPCE500_PCI_OW4:
         switch (addr & 0xC) {
-        case PCI_POTAR: pci->pob[(addr >> 5) & 0x7].potar = value; break;
-        case PCI_POTEAR: pci->pob[(addr >> 5) & 0x7].potear = value; break;
-        case PCI_POWBAR: pci->pob[(addr >> 5) & 0x7].powbar = value; break;
-        case PCI_POWAR: pci->pob[(addr >> 5) & 0x7].powar = value; break;
-        default: break;
+        case PCI_POTAR:
+            pci->pob[(addr >> 5) & 0x7].potar = value;
+            break;
+        case PCI_POTEAR:
+            pci->pob[(addr >> 5) & 0x7].potear = value;
+            break;
+        case PCI_POWBAR:
+            pci->pob[(addr >> 5) & 0x7].powbar = value;
+            break;
+        case PCI_POWAR:
+            pci->pob[(addr >> 5) & 0x7].powar = value;
+            break;
+        default:
+            break;
         };
         break;
 
@@ -166,11 +193,20 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr,
     case PPCE500_PCI_IW2:
     case PPCE500_PCI_IW1:
         switch (addr & 0xC) {
-        case PCI_PITAR: pci->pib[(addr >> 5) & 0x3].pitar = value; break;
-        case PCI_PIWBAR: pci->pib[(addr >> 5) & 0x3].piwbar = value; break;
-        case PCI_PIWBEAR: pci->pib[(addr >> 5) & 0x3].piwbear = value; break;
-        case PCI_PIWAR: pci->pib[(addr >> 5) & 0x3].piwar = value; break;
-        default: break;
+        case PCI_PITAR:
+            pci->pib[(addr >> 5) & 0x3].pitar = value;
+            break;
+        case PCI_PIWBAR:
+            pci->pib[(addr >> 5) & 0x3].piwbar = value;
+            break;
+        case PCI_PIWBEAR:
+            pci->pib[(addr >> 5) & 0x3].piwbear = value;
+            break;
+        case PCI_PIWAR:
+            pci->pib[(addr >> 5) & 0x3].piwar = value;
+            break;
+        default:
+            break;
         };
         break;
 
-- 
1.6.0.2

  reply	other threads:[~2011-10-30 20:14 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-10-30 20:22 [Qemu-devel] [PULL 00/22] ppc patch queue 2011-10-30 Alexander Graf
2011-10-30 20:22 ` Alexander Graf [this message]
2011-10-30 20:22 ` [Qemu-devel] [PATCH 02/22] ppc/e500_pci: Fix an array overflow issue Alexander Graf
2011-10-30 20:22 ` [Qemu-devel] [PATCH 03/22] pseries: Support SMT systems for KVM Book3S-HV Alexander Graf
2011-10-30 20:22 ` [Qemu-devel] [PATCH 04/22] pseries: Allow KVM Book3S-HV on PPC970 CPUS Alexander Graf
2011-10-30 20:22 ` [Qemu-devel] [PATCH 05/22] pseries: Use Book3S-HV TCE acceleration capabilities Alexander Graf
2011-10-30 20:22 ` [Qemu-devel] [PATCH 06/22] pseries: Update SLOF firmware image Alexander Graf
2011-10-30 20:22 ` [Qemu-devel] [PATCH 07/22] Set an invalid-bits mask for each SPE instructions Alexander Graf
2011-10-30 20:22 ` [Qemu-devel] [PATCH 08/22] ppc: Generalize the kvmppc_get_clockfreq() function Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 09/22] pseries: Add device tree properties for VMX/VSX and DFP under kvm Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 10/22] pseries: Update SLOF firmware image Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 11/22] ppc: Remove broken partial PVR matching Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 12/22] ppc: First cut implementation of -cpu host Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 13/22] ppc: Add cpu defs for POWER7 revisions 2.1 and 2.3 Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 14/22] pseries: Under kvm use guest cpu = host cpu by default Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 15/22] PPC: Bump qemu-system-ppc to 64-bit physical address space Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 16/22] PPC: Disable non-440 CPUs for ppcemb target Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 17/22] ppc: Avoid decrementer related kvm exits Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 18/22] PPC: Fail configure when libfdt is not available Alexander Graf
2011-11-01 19:28   ` Blue Swirl
2011-11-01 20:42     ` Alexander Graf
2011-11-01 23:59     ` [Qemu-devel] [Qemu-ppc] " David Gibson
2011-10-30 20:23 ` [Qemu-devel] [PATCH 19/22] pseries: Correct vmx/dfp handling in both KVM and TCG cases Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 20/22] ppc: Fix up usermode only builds Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 21/22] KVM: PPC: Override host vmx/vsx/dfp only when information known Alexander Graf
2011-10-30 20:23 ` [Qemu-devel] [PATCH 22/22] pseries: Allow writes to KVM accelerated TCE table Alexander Graf
2011-10-31  4:03 ` [Qemu-devel] [PULL 00/22] ppc patch queue 2011-10-30 Alexander Graf
2011-10-31  4:12 ` [Qemu-devel] [PATCH 23/22] ppc: Alter CPU state to mask out TCG unimplemented instructions as appropriate Alexander Graf
2011-10-31  4:12 ` [Qemu-devel] [PATCH 24/22] pseries: Add partial support for PCI Alexander Graf
2011-11-01 21:05 ` [Qemu-devel] [PULL 00/22] ppc patch queue 2011-10-30 Blue Swirl
2011-11-01 21:41   ` Anthony Liguori
2011-11-01 22:14     ` Alexander Graf
2011-11-01 22:16       ` Anthony Liguori
2011-11-01 22:28         ` Alexander Graf
2011-11-01 22:32           ` Anthony Liguori
2011-11-02  0:12           ` [Qemu-devel] [Qemu-ppc] " David Gibson
2011-11-02 19:59     ` [Qemu-devel] " Blue Swirl
2011-11-02 20:11       ` Anthony Liguori
2011-11-02 20:38       ` Alexander Graf

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1320006193-15219-2-git-send-email-agraf@suse.de \
    --to=agraf@suse.de \
    --cc=blauwirbel@gmail.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=yu.liu@freescale.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).