From: "Andreas Färber" <andreas.faerber@web.de>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Andreas Färber" <andreas.faerber@web.de>
Subject: [Qemu-devel] [RFC 1/5] target-arm: Infer ARMv4T feature
Date: Thu, 10 Nov 2011 11:31:56 +0100 [thread overview]
Message-ID: <1320921120-11574-2-git-send-email-andreas.faerber@web.de> (raw)
In-Reply-To: <1320921120-11574-1-git-send-email-andreas.faerber@web.de>
ARMv5 => ARMv4T
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
---
target-arm/helper.c | 15 +++------------
1 files changed, 3 insertions(+), 12 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 3daf2f2..0d7635b 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -52,7 +52,6 @@ static void cpu_reset_model_id(CPUARMState *env)
{
switch (env->cp15_c0_cpuid) {
case ARM_CPUID_ARM926:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_VFP);
env->vfp.xregs[ARM_VFP_FPSID] = 0x41011090;
@@ -60,14 +59,12 @@ static void cpu_reset_model_id(CPUARMState *env)
env->cp15.c1_sys = 0x00090078;
break;
case ARM_CPUID_ARM946:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_MPU);
env->cp15.c0_cachetype = 0x0f004006;
env->cp15.c1_sys = 0x00000078;
break;
case ARM_CPUID_ARM1026:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_AUXCR);
@@ -84,7 +81,6 @@ static void cpu_reset_model_id(CPUARMState *env)
* older core than plain "arm1136". In particular this does not
* have the v6K features.
*/
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_VFP);
@@ -102,7 +98,6 @@ static void cpu_reset_model_id(CPUARMState *env)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM1176:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -118,7 +113,6 @@ static void cpu_reset_model_id(CPUARMState *env)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM11MPCORE:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -133,7 +127,6 @@ static void cpu_reset_model_id(CPUARMState *env)
env->cp15.c0_cachetype = 0x1dd20d2;
break;
case ARM_CPUID_CORTEXA8:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -157,7 +150,6 @@ static void cpu_reset_model_id(CPUARMState *env)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXA9:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -186,7 +178,6 @@ static void cpu_reset_model_id(CPUARMState *env)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXM3:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_THUMB2);
@@ -195,7 +186,6 @@ static void cpu_reset_model_id(CPUARMState *env)
set_feature(env, ARM_FEATURE_THUMB_DIV);
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -225,7 +215,6 @@ static void cpu_reset_model_id(CPUARMState *env)
case ARM_CPUID_PXA260:
case ARM_CPUID_PXA261:
case ARM_CPUID_PXA262:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_XSCALE);
/* JTAG_ID is ((id << 28) | 0x09265013) */
@@ -238,7 +227,6 @@ static void cpu_reset_model_id(CPUARMState *env)
case ARM_CPUID_PXA270_B1:
case ARM_CPUID_PXA270_C0:
case ARM_CPUID_PXA270_C5:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_XSCALE);
/* JTAG_ID is ((id << 28) | 0x09265013) */
@@ -261,6 +249,9 @@ static void cpu_reset_model_id(CPUARMState *env)
if (arm_feature(env, ARM_FEATURE_V7)) {
set_feature(env, ARM_FEATURE_VAPA);
}
+ if (arm_feature(env, ARM_FEATURE_V5)) {
+ set_feature(env, ARM_FEATURE_V4T);
+ }
if (arm_feature(env, ARM_FEATURE_ARM_DIV)) {
set_feature(env, ARM_FEATURE_THUMB_DIV);
}
--
1.7.7
next prev parent reply other threads:[~2011-11-10 10:32 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-10-02 18:56 [Qemu-devel] [RFC 0/2] target-arm: Adding Cortex-R4F support Andreas Färber
2011-10-02 18:56 ` [Qemu-devel] [RFC 1/2] target-arm: Prepare support for Cortex-R4 Andreas Färber
2011-10-02 18:56 ` [Qemu-devel] [RFC 2/2] target-arm: Add support for Cortex-R4F Andreas Färber
2011-10-02 21:44 ` [Qemu-devel] [RFC 0/2] target-arm: Adding Cortex-R4F support Peter Maydell
2011-10-03 8:28 ` Peter Maydell
2011-10-06 10:16 ` Andreas Färber
2011-10-06 10:37 ` Peter Maydell
2011-10-22 11:00 ` [Qemu-devel] [RFC] target-arm: Preserve CPUID over CPU reset Andreas Färber
2011-11-10 10:31 ` [Qemu-devel] [RFC post-1.0 0/5] Inference of ARM features Andreas Färber
2011-11-10 10:31 ` Andreas Färber [this message]
2011-11-10 10:31 ` [Qemu-devel] [RFC 2/5] target-arm: Infer ARMv5 feature Andreas Färber
2011-11-10 10:31 ` [Qemu-devel] [RFC 3/5] target-arm: Infer ARMv6 feature Andreas Färber
2011-11-10 10:31 ` [Qemu-devel] [FYI 4/5] target-arm: Prepare support for Cortex-R4 Andreas Färber
2011-11-10 10:32 ` [Qemu-devel] [FYI 5/5] target-arm: Add support for Cortex-R4F Andreas Färber
2011-11-10 16:12 ` Peter Maydell
2011-11-10 13:25 ` [Qemu-devel] [RFC post-1.0 0/5] Inference of ARM features Peter Maydell
2011-11-10 15:03 ` [Qemu-devel] [RFC] target-arm: Preserve CPUID over CPU reset Peter Maydell
2011-10-03 10:32 ` [Qemu-devel] [PATCH] target-arm: Tidy up ARM1136 CPUID naming Andreas Färber
2011-10-22 9:22 ` Andreas Färber
2011-10-22 10:20 ` Peter Maydell
2011-10-22 10:33 ` Andreas Färber
2011-10-24 11:15 ` Peter Maydell
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