[Qemu-devel] [PATCH 11/14] sun4c_intctl: convert to memory API

["Benoît Canet" <benoit.canet@gmail.com>]

Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
---
 hw/sun4c_intctl.c |   32 +++++++++++++++-----------------
 1 files changed, 15 insertions(+), 17 deletions(-)

diff --git a/hw/sun4c_intctl.c b/hw/sun4c_intctl.c
index 5c7fdef..4d01d1c 100644
--- a/hw/sun4c_intctl.c
+++ b/hw/sun4c_intctl.c
@@ -46,6 +46,7 @@
 
 typedef struct Sun4c_INTCTLState {
     SysBusDevice busdev;
+    MemoryRegion iomem;
 #ifdef DEBUG_IRQ_COUNT
     uint64_t irq_count;
 #endif
@@ -60,7 +61,8 @@ typedef struct Sun4c_INTCTLState {
 
 static void sun4c_check_interrupts(void *opaque);
 
-static uint32_t sun4c_intctl_mem_readb(void *opaque, target_phys_addr_t addr)
+static uint64_t sun4c_intctl_mem_readb(void *opaque, target_phys_addr_t addr,
+                                       unsigned size)
 {
     Sun4c_INTCTLState *s = opaque;
     uint32_t ret;
@@ -72,7 +74,7 @@ static uint32_t sun4c_intctl_mem_readb(void *opaque, target_phys_addr_t addr)
 }
 
 static void sun4c_intctl_mem_writeb(void *opaque, target_phys_addr_t addr,
-                                    uint32_t val)
+                                    uint64_t val, unsigned size)
 {
     Sun4c_INTCTLState *s = opaque;
 
@@ -82,16 +84,14 @@ static void sun4c_intctl_mem_writeb(void *opaque, target_phys_addr_t addr,
     sun4c_check_interrupts(s);
 }
 
-static CPUReadMemoryFunc * const sun4c_intctl_mem_read[3] = {
-    sun4c_intctl_mem_readb,
-    NULL,
-    NULL,
-};
-
-static CPUWriteMemoryFunc * const sun4c_intctl_mem_write[3] = {
-    sun4c_intctl_mem_writeb,
-    NULL,
-    NULL,
+static const MemoryRegionOps sun4c_intctl_mem_ops = {
+    .read = sun4c_intctl_mem_readb,
+    .write = sun4c_intctl_mem_writeb,
+    .endianness = DEVICE_NATIVE_ENDIAN,
+    .impl = {
+        .min_access_size = 1,
+        .max_access_size = 1,
+    },
 };
 
 void sun4c_pic_info(Monitor *mon, void *opaque)
@@ -192,13 +192,11 @@ static void sun4c_intctl_reset(DeviceState *d)
 static int sun4c_intctl_init1(SysBusDevice *dev)
 {
     Sun4c_INTCTLState *s = FROM_SYSBUS(Sun4c_INTCTLState, dev);
-    int io_memory;
     unsigned int i;
 
-    io_memory = cpu_register_io_memory(sun4c_intctl_mem_read,
-                                       sun4c_intctl_mem_write, s,
-                                       DEVICE_NATIVE_ENDIAN);
-    sysbus_init_mmio(dev, INTCTL_SIZE, io_memory);
+    memory_region_init_io(&s->iomem, &sun4c_intctl_mem_ops, s,
+                          "interrupt-controller", INTCTL_SIZE);
+    sysbus_init_mmio_region(dev, &s->iomem);
     qdev_init_gpio_in(&dev->qdev, sun4c_set_irq, 8);
 
     for (i = 0; i < MAX_PILS; i++) {
-- 
1.7.5.4