From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:49327) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RR11i-00032w-1s for qemu-devel@nongnu.org; Thu, 17 Nov 2011 07:25:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RR11d-0001dh-QO for qemu-devel@nongnu.org; Thu, 17 Nov 2011 07:25:10 -0500 Received: from mail-wy0-f173.google.com ([74.125.82.173]:54055) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RR11d-0001bx-JR for qemu-devel@nongnu.org; Thu, 17 Nov 2011 07:25:05 -0500 Received: by wyg34 with SMTP id 34so2096900wyg.4 for ; Thu, 17 Nov 2011 04:25:04 -0800 (PST) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= Date: Thu, 17 Nov 2011 13:24:55 +0100 Message-Id: <1321532700-8929-1-git-send-email-benoit.canet@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH 0/5] Convert remaining sh4 devices to memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com These patches converts the remaining sh4 devices to the memory API. The patch "sh_intc: convert interrupt controller to memory API" is somewhat tricky. BenoƮt Canet (5): sh7750: convert memory controller/ioport to memory API sh7750: convert cache and tlb to memory API sh_timer: convert to memory API sh_intc: convert interrupt controller to memory API sh_serial: convert to memory API hw/r2d.c | 2 +- hw/sh.h | 9 ++- hw/sh7750.c | 155 +++++++++++++++++++++++++++++---------------------- hw/sh_intc.c | 87 +++++++++++++++++++--------- hw/sh_intc.h | 7 ++- hw/sh_serial.c | 55 ++++++++++-------- hw/sh_timer.c | 43 ++++++++------ hw/shix.c | 2 +- target-sh4/helper.c | 3 + 9 files changed, 217 insertions(+), 146 deletions(-) -- 1.7.5.4