From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:59522) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RSx3f-0004sb-Vz for qemu-devel@nongnu.org; Tue, 22 Nov 2011 15:35:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RSx3e-0004k6-Uw for qemu-devel@nongnu.org; Tue, 22 Nov 2011 15:35:11 -0500 Received: from mail-ww0-f41.google.com ([74.125.82.41]:41262) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RSx3e-0004jw-HE for qemu-devel@nongnu.org; Tue, 22 Nov 2011 15:35:10 -0500 Received: by wwf25 with SMTP id 25so7854012wwf.4 for ; Tue, 22 Nov 2011 12:35:09 -0800 (PST) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= Date: Tue, 22 Nov 2011 21:34:52 +0100 Message-Id: <1321994102-28263-2-git-send-email-benoit.canet@gmail.com> In-Reply-To: <1321994102-28263-1-git-send-email-benoit.canet@gmail.com> References: <1321994102-28263-1-git-send-email-benoit.canet@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v3 01/11] mcf5206: convert to memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com Signed-off-by: Benoît Canet --- hw/an5206.c | 2 +- hw/mcf.h | 5 ++++- hw/mcf5206.c | 37 +++++++++++++++++++++---------------- 3 files changed, 26 insertions(+), 18 deletions(-) diff --git a/hw/an5206.c b/hw/an5206.c index 3fe1f00..319a40e 100644 --- a/hw/an5206.c +++ b/hw/an5206.c @@ -53,7 +53,7 @@ static void an5206_init(ram_addr_t ram_size, memory_region_init_ram(sram, NULL, "an5206.sram", 512); memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram); - mcf5206_init(AN5206_MBAR_ADDR, env); + mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, env); /* Load kernel. */ if (!kernel_filename) { diff --git a/hw/mcf.h b/hw/mcf.h index 91f2821..572424d 100644 --- a/hw/mcf.h +++ b/hw/mcf.h @@ -2,6 +2,8 @@ #define HW_MCF_H /* Motorola ColdFire device prototypes. */ +struct MemoryRegion; + /* mcf_uart.c */ uint32_t mcf_uart_read(void *opaque, target_phys_addr_t addr); void mcf_uart_write(void *opaque, target_phys_addr_t addr, uint32_t val); @@ -16,6 +18,7 @@ qemu_irq *mcf_intc_init(target_phys_addr_t base, CPUState *env); void mcf_fec_init(NICInfo *nd, target_phys_addr_t base, qemu_irq *irq); /* mcf5206.c */ -qemu_irq *mcf5206_init(uint32_t base, CPUState *env); +qemu_irq *mcf5206_init(struct MemoryRegion *sysmem, + uint32_t base, CPUState *env); #endif diff --git a/hw/mcf5206.c b/hw/mcf5206.c index 15d6f22..987687d 100644 --- a/hw/mcf5206.c +++ b/hw/mcf5206.c @@ -9,6 +9,7 @@ #include "mcf.h" #include "qemu-timer.h" #include "sysemu.h" +#include "exec-memory.h" /* General purpose timer module. */ typedef struct { @@ -144,6 +145,7 @@ static m5206_timer_state *m5206_timer_init(qemu_irq irq) typedef struct { CPUState *env; + MemoryRegion iomem; m5206_timer_state *timer[2]; void *uart[2]; uint8_t scr; @@ -505,29 +507,32 @@ static void m5206_mbar_writel(void *opaque, target_phys_addr_t offset, m5206_mbar_write(s, offset, value); } -static CPUReadMemoryFunc * const m5206_mbar_readfn[] = { - m5206_mbar_readb, - m5206_mbar_readw, - m5206_mbar_readl +static const MemoryRegionOps m5206_mbar_ops = { + .old_mmio = { + .read = { + m5206_mbar_readb, + m5206_mbar_readw, + m5206_mbar_readl, + }, + .write = { + m5206_mbar_writeb, + m5206_mbar_writew, + m5206_mbar_writel, + }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; -static CPUWriteMemoryFunc * const m5206_mbar_writefn[] = { - m5206_mbar_writeb, - m5206_mbar_writew, - m5206_mbar_writel -}; - -qemu_irq *mcf5206_init(uint32_t base, CPUState *env) +qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, CPUState *env) { m5206_mbar_state *s; qemu_irq *pic; - int iomemtype; s = (m5206_mbar_state *)g_malloc0(sizeof(m5206_mbar_state)); - iomemtype = cpu_register_io_memory(m5206_mbar_readfn, - m5206_mbar_writefn, s, - DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(base, 0x00001000, iomemtype); + + memory_region_init_io(&s->iomem, &m5206_mbar_ops, s, + "mbar", 0x00001000); + memory_region_add_subregion(sysmem, base, &s->iomem); pic = qemu_allocate_irqs(m5206_mbar_set_irq, s, 14); s->timer[0] = m5206_timer_init(pic[9]); -- 1.7.7.3