From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:34612) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RTZOt-000395-BN for qemu-devel@nongnu.org; Thu, 24 Nov 2011 08:31:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RTZOo-00054G-TI for qemu-devel@nongnu.org; Thu, 24 Nov 2011 08:31:39 -0500 Received: from mail-ww0-f53.google.com ([74.125.82.53]:40520) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RTZOo-000522-OI for qemu-devel@nongnu.org; Thu, 24 Nov 2011 08:31:34 -0500 Received: by mail-ww0-f53.google.com with SMTP id 10so1156205wwf.10 for ; Thu, 24 Nov 2011 05:31:34 -0800 (PST) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= Date: Thu, 24 Nov 2011 14:31:17 +0100 Message-Id: <1322141482-12173-7-git-send-email-benoit.canet@gmail.com> In-Reply-To: <1322141482-12173-1-git-send-email-benoit.canet@gmail.com> References: <1322141482-12173-1-git-send-email-benoit.canet@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v4 06/11] lm32_sys: convert to memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com Signed-off-by: Benoît Canet --- hw/lm32_sys.c | 28 ++++++++++++++-------------- 1 files changed, 14 insertions(+), 14 deletions(-) diff --git a/hw/lm32_sys.c b/hw/lm32_sys.c index e5ff962..0c8e971 100644 --- a/hw/lm32_sys.c +++ b/hw/lm32_sys.c @@ -47,6 +47,7 @@ enum { struct LM32SysState { SysBusDevice busdev; + MemoryRegion iomem; uint32_t base; uint32_t regs[R_MAX]; uint8_t testname[MAX_TESTNAME_LEN]; @@ -60,7 +61,8 @@ static void copy_testname(LM32SysState *s) s->testname[MAX_TESTNAME_LEN - 1] = '\0'; } -static void sys_write(void *opaque, target_phys_addr_t addr, uint32_t value) +static void sys_write(void *opaque, target_phys_addr_t addr, + uint64_t value, unsigned size) { LM32SysState *s = opaque; char *testname; @@ -89,16 +91,16 @@ static void sys_write(void *opaque, target_phys_addr_t addr, uint32_t value) } } -static CPUReadMemoryFunc * const sys_read_fn[] = { - NULL, - NULL, - NULL, -}; +static bool sys_ops_accepts(void *opaque, target_phys_addr_t addr, + unsigned size, bool is_write) +{ + return is_write && size == 4; +} -static CPUWriteMemoryFunc * const sys_write_fn[] = { - NULL, - NULL, - &sys_write, +static const MemoryRegionOps sys_ops = { + .write = sys_write, + .valid.accepts = sys_ops_accepts, + .endianness = DEVICE_NATIVE_ENDIAN, }; static void sys_reset(DeviceState *d) @@ -115,11 +117,9 @@ static void sys_reset(DeviceState *d) static int lm32_sys_init(SysBusDevice *dev) { LM32SysState *s = FROM_SYSBUS(typeof(*s), dev); - int sys_regs; - sys_regs = cpu_register_io_memory(sys_read_fn, sys_write_fn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, R_MAX * 4, sys_regs); + memory_region_init_io(&s->iomem, &sys_ops , s, "sys", R_MAX * 4); + sysbus_init_mmio_region(dev, &s->iomem); /* Note: This device is not created in the board initialization, * instead it has to be added with the -device parameter. Therefore, -- 1.7.7.3