From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52991) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RXhry-00026s-QV for qemu-devel@nongnu.org; Mon, 05 Dec 2011 18:22:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RXhrx-00030n-KX for qemu-devel@nongnu.org; Mon, 05 Dec 2011 18:22:46 -0500 Received: from cantor2.suse.de ([195.135.220.15]:36436 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RXhrx-00030a-A9 for qemu-devel@nongnu.org; Mon, 05 Dec 2011 18:22:45 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Tue, 6 Dec 2011 00:21:14 +0100 Message-Id: <1323127282-20306-2-git-send-email-afaerber@suse.de> In-Reply-To: <1323127282-20306-1-git-send-email-afaerber@suse.de> References: <1323127282-20306-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v2 1/9] target-arm: Infer ARMv4T feature List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= From: Andreas F=C3=A4rber ARMv5 =3D> ARMv4T Signed-off-by: Andreas F=C3=A4rber Cc: Peter Maydell --- target-arm/helper.c | 15 +++------------ 1 files changed, 3 insertions(+), 12 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 97af4d0..79d42f0 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -53,7 +53,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32= _t id) env->cp15.c0_cpuid =3D id; switch (id) { case ARM_CPUID_ARM926: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_VFP); env->vfp.xregs[ARM_VFP_FPSID] =3D 0x41011090; @@ -61,14 +60,12 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) env->cp15.c1_sys =3D 0x00090078; break; case ARM_CPUID_ARM946: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_MPU); env->cp15.c0_cachetype =3D 0x0f004006; env->cp15.c1_sys =3D 0x00000078; break; case ARM_CPUID_ARM1026: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_VFP); set_feature(env, ARM_FEATURE_AUXCR); @@ -85,7 +82,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32= _t id) * older core than plain "arm1136". In particular this does not * have the v6K features. */ - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_VFP); @@ -103,7 +99,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint3= 2_t id) env->cp15.c1_sys =3D 0x00050078; break; case ARM_CPUID_ARM1176: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); @@ -119,7 +114,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) env->cp15.c1_sys =3D 0x00050078; break; case ARM_CPUID_ARM11MPCORE: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); @@ -134,7 +128,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) env->cp15.c0_cachetype =3D 0x1dd20d2; break; case ARM_CPUID_CORTEXA8: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); @@ -158,7 +151,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) env->cp15.c1_sys =3D 0x00c50078; break; case ARM_CPUID_CORTEXA9: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); @@ -187,7 +179,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) env->cp15.c1_sys =3D 0x00c50078; break; case ARM_CPUID_CORTEXM3: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_THUMB2); @@ -196,7 +187,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) set_feature(env, ARM_FEATURE_THUMB_DIV); break; case ARM_CPUID_ANY: /* For userspace emulation. */ - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); @@ -226,7 +216,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) case ARM_CPUID_PXA260: case ARM_CPUID_PXA261: case ARM_CPUID_PXA262: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_XSCALE); /* JTAG_ID is ((id << 28) | 0x09265013) */ @@ -239,7 +228,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) case ARM_CPUID_PXA270_B1: case ARM_CPUID_PXA270_C0: case ARM_CPUID_PXA270_C5: - set_feature(env, ARM_FEATURE_V4T); set_feature(env, ARM_FEATURE_V5); set_feature(env, ARM_FEATURE_XSCALE); /* JTAG_ID is ((id << 28) | 0x09265013) */ @@ -262,6 +250,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) if (arm_feature(env, ARM_FEATURE_V7)) { set_feature(env, ARM_FEATURE_VAPA); } + if (arm_feature(env, ARM_FEATURE_V5)) { + set_feature(env, ARM_FEATURE_V4T); + } if (arm_feature(env, ARM_FEATURE_ARM_DIV)) { set_feature(env, ARM_FEATURE_THUMB_DIV); } --=20 1.7.7