* [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features
@ 2011-12-05 23:21 Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 1/9] target-arm: Infer ARMv4T feature Andreas Färber
` (8 more replies)
0 siblings, 9 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Bill Carson
From: Andreas Färber <andreas.faerber@web.de>
Hello Peter,
Here's an extended version of my inference series, taking into account your
suggestions and dropping my motivating FYI patches for Cortex-R4F.
v1 -> v2:
* Add V7 && !M => V6K
* Add V7 => THUMB2
* Add V6K => V6
* Add V6 => AUXCR
* Add M => THUMB_DIV
* Add VFP3 => VFP
* Add VFP4 => VFP3
Question: Should we also add the following rules?
V7MP => V7
THUMB2EE => THUMB2
VFP4 => NEON
Regards,
Andreas
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Bill Carson <bill4carson@gmail.com>
Andreas Färber (9):
target-arm: Infer ARMv4T feature
target-arm: Infer ARMv5 feature
target-arm: Infer ARMv6 feature from v6K
target-arm: Infer ARMv6(K) feature from ARMv7
target-arm: Infer AUXCR feature from ARMv6
target-arm: Infer Thumb2 feature from ARMv7
target-arm: Infer Thumb division feature from M profile
target-arm: Infer VFP feature from VFPv3
target-arm: Infer VFPv3 feature from VFPv4
target-arm/helper.c | 67 +++++++++++++++++++--------------------------------
1 files changed, 25 insertions(+), 42 deletions(-)
--
1.7.7
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v2 1/9] target-arm: Infer ARMv4T feature
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
@ 2011-12-05 23:21 ` Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 2/9] target-arm: Infer ARMv5 feature Andreas Färber
` (7 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
From: Andreas Färber <andreas.faerber@web.de>
ARMv5 => ARMv4T
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 15 +++------------
1 files changed, 3 insertions(+), 12 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 97af4d0..79d42f0 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -53,7 +53,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c0_cpuid = id;
switch (id) {
case ARM_CPUID_ARM926:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_VFP);
env->vfp.xregs[ARM_VFP_FPSID] = 0x41011090;
@@ -61,14 +60,12 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00090078;
break;
case ARM_CPUID_ARM946:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_MPU);
env->cp15.c0_cachetype = 0x0f004006;
env->cp15.c1_sys = 0x00000078;
break;
case ARM_CPUID_ARM1026:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_AUXCR);
@@ -85,7 +82,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
* older core than plain "arm1136". In particular this does not
* have the v6K features.
*/
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_VFP);
@@ -103,7 +99,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM1176:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -119,7 +114,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM11MPCORE:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -134,7 +128,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c0_cachetype = 0x1dd20d2;
break;
case ARM_CPUID_CORTEXA8:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -158,7 +151,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXA9:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -187,7 +179,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXM3:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_THUMB2);
@@ -196,7 +187,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
set_feature(env, ARM_FEATURE_THUMB_DIV);
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
@@ -226,7 +216,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
case ARM_CPUID_PXA260:
case ARM_CPUID_PXA261:
case ARM_CPUID_PXA262:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_XSCALE);
/* JTAG_ID is ((id << 28) | 0x09265013) */
@@ -239,7 +228,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
case ARM_CPUID_PXA270_B1:
case ARM_CPUID_PXA270_C0:
case ARM_CPUID_PXA270_C5:
- set_feature(env, ARM_FEATURE_V4T);
set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_XSCALE);
/* JTAG_ID is ((id << 28) | 0x09265013) */
@@ -262,6 +250,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
if (arm_feature(env, ARM_FEATURE_V7)) {
set_feature(env, ARM_FEATURE_VAPA);
}
+ if (arm_feature(env, ARM_FEATURE_V5)) {
+ set_feature(env, ARM_FEATURE_V4T);
+ }
if (arm_feature(env, ARM_FEATURE_ARM_DIV)) {
set_feature(env, ARM_FEATURE_THUMB_DIV);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v2 2/9] target-arm: Infer ARMv5 feature
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 1/9] target-arm: Infer ARMv4T feature Andreas Färber
@ 2011-12-05 23:21 ` Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 3/9] target-arm: Infer ARMv6 feature from v6K Andreas Färber
` (6 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
From: Andreas Färber <andreas.faerber@web.de>
ARMv6 => ARMv5
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 10 +++-------
1 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 79d42f0..b8b6921 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -82,7 +82,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
* older core than plain "arm1136". In particular this does not
* have the v6K features.
*/
- set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_AUXCR);
@@ -99,7 +98,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM1176:
- set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_VFP);
@@ -114,7 +112,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM11MPCORE:
- set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_VFP);
@@ -128,7 +125,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c0_cachetype = 0x1dd20d2;
break;
case ARM_CPUID_CORTEXA8:
- set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_V7);
@@ -151,7 +147,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXA9:
- set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_V7);
@@ -179,7 +174,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXM3:
- set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_V7);
@@ -187,7 +181,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
set_feature(env, ARM_FEATURE_THUMB_DIV);
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
- set_feature(env, ARM_FEATURE_V5);
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_V7);
@@ -250,6 +243,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
if (arm_feature(env, ARM_FEATURE_V7)) {
set_feature(env, ARM_FEATURE_VAPA);
}
+ if (arm_feature(env, ARM_FEATURE_V6)) {
+ set_feature(env, ARM_FEATURE_V5);
+ }
if (arm_feature(env, ARM_FEATURE_V5)) {
set_feature(env, ARM_FEATURE_V4T);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v2 3/9] target-arm: Infer ARMv6 feature from v6K
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 1/9] target-arm: Infer ARMv4T feature Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 2/9] target-arm: Infer ARMv5 feature Andreas Färber
@ 2011-12-05 23:21 ` Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 4/9] target-arm: Infer ARMv6(K) feature from ARMv7 Andreas Färber
` (5 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
From: Andreas Färber <andreas.faerber@web.de>
V6K => V6
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 8 +++-----
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index b8b6921..109918b 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -98,7 +98,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM1176:
- set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_AUXCR);
@@ -112,7 +111,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM11MPCORE:
- set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_AUXCR);
@@ -125,7 +123,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c0_cachetype = 0x1dd20d2;
break;
case ARM_CPUID_CORTEXA8:
- set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_V7);
set_feature(env, ARM_FEATURE_AUXCR);
@@ -147,7 +144,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXA9:
- set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_V7);
set_feature(env, ARM_FEATURE_AUXCR);
@@ -181,7 +177,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
set_feature(env, ARM_FEATURE_THUMB_DIV);
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
- set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_V7);
set_feature(env, ARM_FEATURE_THUMB2);
@@ -243,6 +238,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
if (arm_feature(env, ARM_FEATURE_V7)) {
set_feature(env, ARM_FEATURE_VAPA);
}
+ if (arm_feature(env, ARM_FEATURE_V6K)) {
+ set_feature(env, ARM_FEATURE_V6);
+ }
if (arm_feature(env, ARM_FEATURE_V6)) {
set_feature(env, ARM_FEATURE_V5);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v2 4/9] target-arm: Infer ARMv6(K) feature from ARMv7
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
` (2 preceding siblings ...)
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 3/9] target-arm: Infer ARMv6 feature from v6K Andreas Färber
@ 2011-12-05 23:21 ` Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 5/9] target-arm: Infer AUXCR feature from ARMv6 Andreas Färber
` (4 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
From: Andreas Färber <andreas.faerber@web.de>
V7 => V6, if M profile
V7 => V6K otherwise
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
---
target-arm/helper.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 109918b..caee25c 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -123,7 +123,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c0_cachetype = 0x1dd20d2;
break;
case ARM_CPUID_CORTEXA8:
- set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_V7);
set_feature(env, ARM_FEATURE_AUXCR);
set_feature(env, ARM_FEATURE_THUMB2);
@@ -144,7 +143,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXA9:
- set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_V7);
set_feature(env, ARM_FEATURE_AUXCR);
set_feature(env, ARM_FEATURE_THUMB2);
@@ -170,14 +168,12 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXM3:
- set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_V7);
set_feature(env, ARM_FEATURE_M);
set_feature(env, ARM_FEATURE_THUMB_DIV);
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
- set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_V7);
set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_VFP);
@@ -237,6 +233,11 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
/* Some features automatically imply others: */
if (arm_feature(env, ARM_FEATURE_V7)) {
set_feature(env, ARM_FEATURE_VAPA);
+ if (!arm_feature(env, ARM_FEATURE_M)) {
+ set_feature(env, ARM_FEATURE_V6K);
+ } else {
+ set_feature(env, ARM_FEATURE_V6);
+ }
}
if (arm_feature(env, ARM_FEATURE_V6K)) {
set_feature(env, ARM_FEATURE_V6);
--
1.7.7
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v2 5/9] target-arm: Infer AUXCR feature from ARMv6
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
` (3 preceding siblings ...)
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 4/9] target-arm: Infer ARMv6(K) feature from ARMv7 Andreas Färber
@ 2011-12-05 23:21 ` Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 6/9] target-arm: Infer Thumb2 feature from ARMv7 Andreas Färber
` (3 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
From: Andreas Färber <andreas.faerber@web.de>
V6 => AUXCR
Note that this newly enables AUXCR for Cortex-M3.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 6 +-----
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index caee25c..7b52792 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -84,7 +84,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
*/
set_feature(env, ARM_FEATURE_V6);
set_feature(env, ARM_FEATURE_VFP);
- set_feature(env, ARM_FEATURE_AUXCR);
/* These ID register values are correct for 1136 but may be wrong
* for 1136_r2 (in particular r0p2 does not actually implement most
* of the ID registers).
@@ -100,7 +99,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
case ARM_CPUID_ARM1176:
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_VFP);
- set_feature(env, ARM_FEATURE_AUXCR);
set_feature(env, ARM_FEATURE_VAPA);
env->vfp.xregs[ARM_VFP_FPSID] = 0x410120b5;
env->vfp.xregs[ARM_VFP_MVFR0] = 0x11111111;
@@ -113,7 +111,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
case ARM_CPUID_ARM11MPCORE:
set_feature(env, ARM_FEATURE_V6K);
set_feature(env, ARM_FEATURE_VFP);
- set_feature(env, ARM_FEATURE_AUXCR);
set_feature(env, ARM_FEATURE_VAPA);
env->vfp.xregs[ARM_VFP_FPSID] = 0x410120b4;
env->vfp.xregs[ARM_VFP_MVFR0] = 0x11111111;
@@ -124,7 +121,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
break;
case ARM_CPUID_CORTEXA8:
set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_AUXCR);
set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_VFP3);
@@ -144,7 +140,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
break;
case ARM_CPUID_CORTEXA9:
set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_AUXCR);
set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_VFP3);
@@ -244,6 +239,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
}
if (arm_feature(env, ARM_FEATURE_V6)) {
set_feature(env, ARM_FEATURE_V5);
+ set_feature(env, ARM_FEATURE_AUXCR);
}
if (arm_feature(env, ARM_FEATURE_V5)) {
set_feature(env, ARM_FEATURE_V4T);
--
1.7.7
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v2 6/9] target-arm: Infer Thumb2 feature from ARMv7
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
` (4 preceding siblings ...)
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 5/9] target-arm: Infer AUXCR feature from ARMv6 Andreas Färber
@ 2011-12-05 23:21 ` Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 7/9] target-arm: Infer Thumb division feature from M profile Andreas Färber
` (2 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
From: Andreas Färber <andreas.faerber@web.de>
V7 => THUMB2
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 5 +----
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 7b52792..7b1a02f 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -121,7 +121,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
break;
case ARM_CPUID_CORTEXA8:
set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_VFP3);
set_feature(env, ARM_FEATURE_NEON);
@@ -140,7 +139,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
break;
case ARM_CPUID_CORTEXA9:
set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_VFP3);
set_feature(env, ARM_FEATURE_VFP_FP16);
@@ -163,14 +161,12 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXM3:
- set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_V7);
set_feature(env, ARM_FEATURE_M);
set_feature(env, ARM_FEATURE_THUMB_DIV);
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_VFP3);
set_feature(env, ARM_FEATURE_VFP4);
@@ -228,6 +224,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
/* Some features automatically imply others: */
if (arm_feature(env, ARM_FEATURE_V7)) {
set_feature(env, ARM_FEATURE_VAPA);
+ set_feature(env, ARM_FEATURE_THUMB2);
if (!arm_feature(env, ARM_FEATURE_M)) {
set_feature(env, ARM_FEATURE_V6K);
} else {
--
1.7.7
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v2 7/9] target-arm: Infer Thumb division feature from M profile
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
` (5 preceding siblings ...)
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 6/9] target-arm: Infer Thumb2 feature from ARMv7 Andreas Färber
@ 2011-12-05 23:21 ` Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 8/9] target-arm: Infer VFP feature from VFPv3 Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 9/9] target-arm: Infer VFPv3 feature from VFPv4 Andreas Färber
8 siblings, 0 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
From: Andreas Färber <andreas.faerber@web.de>
M => THUMB_DIV
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 7b1a02f..56fec6f 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -163,7 +163,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
case ARM_CPUID_CORTEXM3:
set_feature(env, ARM_FEATURE_V7);
set_feature(env, ARM_FEATURE_M);
- set_feature(env, ARM_FEATURE_THUMB_DIV);
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
set_feature(env, ARM_FEATURE_V7);
@@ -241,6 +240,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
if (arm_feature(env, ARM_FEATURE_V5)) {
set_feature(env, ARM_FEATURE_V4T);
}
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ set_feature(env, ARM_FEATURE_THUMB_DIV);
+ }
if (arm_feature(env, ARM_FEATURE_ARM_DIV)) {
set_feature(env, ARM_FEATURE_THUMB_DIV);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v2 8/9] target-arm: Infer VFP feature from VFPv3
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
` (6 preceding siblings ...)
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 7/9] target-arm: Infer Thumb division feature from M profile Andreas Färber
@ 2011-12-05 23:21 ` Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 9/9] target-arm: Infer VFPv3 feature from VFPv4 Andreas Färber
8 siblings, 0 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
From: Andreas Färber <andreas.faerber@web.de>
VFP3 => VFP
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 56fec6f..a2a5084 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -121,7 +121,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
break;
case ARM_CPUID_CORTEXA8:
set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_VFP3);
set_feature(env, ARM_FEATURE_NEON);
set_feature(env, ARM_FEATURE_THUMB2EE);
@@ -139,7 +138,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
break;
case ARM_CPUID_CORTEXA9:
set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_VFP3);
set_feature(env, ARM_FEATURE_VFP_FP16);
set_feature(env, ARM_FEATURE_NEON);
@@ -166,7 +164,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_VFP);
set_feature(env, ARM_FEATURE_VFP3);
set_feature(env, ARM_FEATURE_VFP4);
set_feature(env, ARM_FEATURE_VFP_FP16);
@@ -246,6 +243,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
if (arm_feature(env, ARM_FEATURE_ARM_DIV)) {
set_feature(env, ARM_FEATURE_THUMB_DIV);
}
+ if (arm_feature(env, ARM_FEATURE_VFP3)) {
+ set_feature(env, ARM_FEATURE_VFP);
+ }
}
void cpu_reset(CPUARMState *env)
--
1.7.7
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v2 9/9] target-arm: Infer VFPv3 feature from VFPv4
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
` (7 preceding siblings ...)
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 8/9] target-arm: Infer VFP feature from VFPv3 Andreas Färber
@ 2011-12-05 23:21 ` Andreas Färber
8 siblings, 0 replies; 10+ messages in thread
From: Andreas Färber @ 2011-12-05 23:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
From: Andreas Färber <andreas.faerber@web.de>
VFP4 => VFP3
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index a2a5084..97df4c2 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -164,7 +164,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_VFP3);
set_feature(env, ARM_FEATURE_VFP4);
set_feature(env, ARM_FEATURE_VFP_FP16);
set_feature(env, ARM_FEATURE_NEON);
@@ -243,6 +242,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
if (arm_feature(env, ARM_FEATURE_ARM_DIV)) {
set_feature(env, ARM_FEATURE_THUMB_DIV);
}
+ if (arm_feature(env, ARM_FEATURE_VFP4)) {
+ set_feature(env, ARM_FEATURE_VFP3);
+ }
if (arm_feature(env, ARM_FEATURE_VFP3)) {
set_feature(env, ARM_FEATURE_VFP);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 10+ messages in thread
end of thread, other threads:[~2011-12-05 23:22 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-12-05 23:21 [Qemu-devel] [PATCH v2 for-1.1 0/9] target-arm: More inference rules for features Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 1/9] target-arm: Infer ARMv4T feature Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 2/9] target-arm: Infer ARMv5 feature Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 3/9] target-arm: Infer ARMv6 feature from v6K Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 4/9] target-arm: Infer ARMv6(K) feature from ARMv7 Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 5/9] target-arm: Infer AUXCR feature from ARMv6 Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 6/9] target-arm: Infer Thumb2 feature from ARMv7 Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 7/9] target-arm: Infer Thumb division feature from M profile Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 8/9] target-arm: Infer VFP feature from VFPv3 Andreas Färber
2011-12-05 23:21 ` [Qemu-devel] [PATCH v2 9/9] target-arm: Infer VFPv3 feature from VFPv4 Andreas Färber
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