From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:41440) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RaX7W-0003q3-CW for qemu-devel@nongnu.org; Tue, 13 Dec 2011 13:30:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RaX7V-00058C-1K for qemu-devel@nongnu.org; Tue, 13 Dec 2011 13:30:30 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:37863) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RaX7U-00057L-Pw for qemu-devel@nongnu.org; Tue, 13 Dec 2011 13:30:29 -0500 From: Peter Maydell Date: Tue, 13 Dec 2011 18:30:11 +0000 Message-Id: <1323801017-17986-5-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1323801017-17986-1-git-send-email-peter.maydell@linaro.org> References: <1323801017-17986-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH 04/10] target-arm: Infer ARMv6 feature from v6K List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Paul Brook , qemu-devel@nongnu.org From: Andreas Färber V6K => V6 Signed-off-by: Andreas Färber Signed-off-by: Peter Maydell --- target-arm/helper.c | 8 +++----- 1 files changed, 3 insertions(+), 5 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 6a78dd0..a948b88 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -98,7 +98,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) env->cp15.c1_sys = 0x00050078; break; case ARM_CPUID_ARM1176: - set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); set_feature(env, ARM_FEATURE_VFP); set_feature(env, ARM_FEATURE_AUXCR); @@ -112,7 +111,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) env->cp15.c1_sys = 0x00050078; break; case ARM_CPUID_ARM11MPCORE: - set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); set_feature(env, ARM_FEATURE_VFP); set_feature(env, ARM_FEATURE_AUXCR); @@ -125,7 +123,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) env->cp15.c0_cachetype = 0x1dd20d2; break; case ARM_CPUID_CORTEXA8: - set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); set_feature(env, ARM_FEATURE_V7); set_feature(env, ARM_FEATURE_AUXCR); @@ -147,7 +144,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) env->cp15.c1_sys = 0x00c50078; break; case ARM_CPUID_CORTEXA9: - set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); set_feature(env, ARM_FEATURE_V7); set_feature(env, ARM_FEATURE_AUXCR); @@ -181,7 +177,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) set_feature(env, ARM_FEATURE_THUMB_DIV); break; case ARM_CPUID_ANY: /* For userspace emulation. */ - set_feature(env, ARM_FEATURE_V6); set_feature(env, ARM_FEATURE_V6K); set_feature(env, ARM_FEATURE_V7); set_feature(env, ARM_FEATURE_THUMB2); @@ -243,6 +238,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) if (arm_feature(env, ARM_FEATURE_V7)) { set_feature(env, ARM_FEATURE_VAPA); } + if (arm_feature(env, ARM_FEATURE_V6K)) { + set_feature(env, ARM_FEATURE_V6); + } if (arm_feature(env, ARM_FEATURE_V6)) { set_feature(env, ARM_FEATURE_V5); } -- 1.7.1