From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:48858) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RbgPc-0004dw-Ko for qemu-devel@nongnu.org; Fri, 16 Dec 2011 17:37:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RbgPa-0005nT-Uy for qemu-devel@nongnu.org; Fri, 16 Dec 2011 17:37:56 -0500 Received: from mail-ww0-f53.google.com ([74.125.82.53]:46350) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RbgPa-0005my-QS for qemu-devel@nongnu.org; Fri, 16 Dec 2011 17:37:54 -0500 Received: by mail-ww0-f53.google.com with SMTP id ds1so6338775wgb.10 for ; Fri, 16 Dec 2011 14:37:54 -0800 (PST) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= Date: Fri, 16 Dec 2011 23:37:47 +0100 Message-Id: <1324075068-1840-3-git-send-email-benoit.canet@gmail.com> In-Reply-To: <1324075068-1840-1-git-send-email-benoit.canet@gmail.com> References: <1324075068-1840-1-git-send-email-benoit.canet@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v3 2/3] ppce500_pci: remove sysbus_init_mmio_cb2 usage List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?UTF-8?q?Beno=C3=AEt=20Canet?= , agraf@suse.de Expose only one container MemoryRegion to sysbus. (Peter Maydell's idea) Signed-off-by: Benoît Canet --- hw/ppce500_pci.c | 27 ++++++--------------------- 1 files changed, 6 insertions(+), 21 deletions(-) diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c index 6232af1..b606206 100644 --- a/hw/ppce500_pci.c +++ b/hw/ppce500_pci.c @@ -79,6 +79,7 @@ struct PPCE500PCIState { uint32_t gasket_time; qemu_irq irq[4]; /* mmio maps */ + MemoryRegion container; MemoryRegion iomem; }; @@ -298,26 +299,6 @@ static const VMStateDescription vmstate_ppce500_pci = { } }; -static void e500_pci_map(SysBusDevice *dev, target_phys_addr_t base) -{ - PCIHostState *h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev)); - PPCE500PCIState *s = DO_UPCAST(PPCE500PCIState, pci_state, h); - - sysbus_add_memory(dev, base + PCIE500_CFGADDR, &h->conf_mem); - sysbus_add_memory(dev, base + PCIE500_CFGDATA, &h->data_mem); - sysbus_add_memory(dev, base + PCIE500_REG_BASE, &s->iomem); -} - -static void e500_pci_unmap(SysBusDevice *dev, target_phys_addr_t base) -{ - PCIHostState *h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev)); - PPCE500PCIState *s = DO_UPCAST(PPCE500PCIState, pci_state, h); - - sysbus_del_memory(dev, &h->conf_mem); - sysbus_del_memory(dev, &h->data_mem); - sysbus_del_memory(dev, &s->iomem); -} - #include "exec-memory.h" static int e500_pcihost_initfn(SysBusDevice *dev) @@ -343,13 +324,17 @@ static int e500_pcihost_initfn(SysBusDevice *dev) pci_create_simple(b, 0, "e500-host-bridge"); + memory_region_init(&s->container, "pci-container", PCIE500_ALL_SIZE); memory_region_init_io(&h->conf_mem, &pci_host_conf_be_ops, h, "pci-conf-idx", 4); memory_region_init_io(&h->data_mem, &pci_host_data_le_ops, h, "pci-conf-data", 4); memory_region_init_io(&s->iomem, &e500_pci_reg_ops, s, "pci.reg", PCIE500_REG_SIZE); - sysbus_init_mmio_cb2(dev, e500_pci_map, e500_pci_unmap); + memory_region_add_subregion(&s->container, PCIE500_CFGADDR, &h->conf_mem); + memory_region_add_subregion(&s->container, PCIE500_CFGDATA, &h->data_mem); + memory_region_add_subregion(&s->container, PCIE500_REG_BASE, &s->iomem); + sysbus_init_mmio(dev, &s->container); return 0; } -- 1.7.7.4